forked from OSchip/llvm-project
109 lines
3.4 KiB
ArmAsm
109 lines
3.4 KiB
ArmAsm
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
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// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
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// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d --mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
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uqdecp x0, p0.b
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// CHECK-INST: uqdecp x0, p0.b
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// CHECK-ENCODING: [0x00,0x8c,0x2b,0x25]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 8c 2b 25 <unknown>
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uqdecp x0, p0.h
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// CHECK-INST: uqdecp x0, p0.h
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// CHECK-ENCODING: [0x00,0x8c,0x6b,0x25]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 8c 6b 25 <unknown>
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uqdecp x0, p0.s
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// CHECK-INST: uqdecp x0, p0.s
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// CHECK-ENCODING: [0x00,0x8c,0xab,0x25]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 8c ab 25 <unknown>
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uqdecp x0, p0.d
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// CHECK-INST: uqdecp x0, p0.d
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// CHECK-ENCODING: [0x00,0x8c,0xeb,0x25]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 8c eb 25 <unknown>
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uqdecp wzr, p15.b
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// CHECK-INST: uqdecp wzr, p15.b
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// CHECK-ENCODING: [0xff,0x89,0x2b,0x25]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff 89 2b 25 <unknown>
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uqdecp wzr, p15.h
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// CHECK-INST: uqdecp wzr, p15.h
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// CHECK-ENCODING: [0xff,0x89,0x6b,0x25]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff 89 6b 25 <unknown>
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uqdecp wzr, p15.s
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// CHECK-INST: uqdecp wzr, p15.s
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// CHECK-ENCODING: [0xff,0x89,0xab,0x25]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff 89 ab 25 <unknown>
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uqdecp wzr, p15.d
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// CHECK-INST: uqdecp wzr, p15.d
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// CHECK-ENCODING: [0xff,0x89,0xeb,0x25]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff 89 eb 25 <unknown>
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uqdecp z0.h, p0
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// CHECK-INST: uqdecp z0.h, p0.h
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// CHECK-ENCODING: [0x00,0x80,0x6b,0x25]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 80 6b 25 <unknown>
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uqdecp z0.h, p0.h
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// CHECK-INST: uqdecp z0.h, p0.h
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// CHECK-ENCODING: [0x00,0x80,0x6b,0x25]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 80 6b 25 <unknown>
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uqdecp z0.s, p0
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// CHECK-INST: uqdecp z0.s, p0.s
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// CHECK-ENCODING: [0x00,0x80,0xab,0x25]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 80 ab 25 <unknown>
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uqdecp z0.s, p0.s
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// CHECK-INST: uqdecp z0.s, p0.s
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// CHECK-ENCODING: [0x00,0x80,0xab,0x25]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 80 ab 25 <unknown>
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uqdecp z0.d, p0
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// CHECK-INST: uqdecp z0.d, p0.d
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// CHECK-ENCODING: [0x00,0x80,0xeb,0x25]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 80 eb 25 <unknown>
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uqdecp z0.d, p0.d
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// CHECK-INST: uqdecp z0.d, p0.d
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// CHECK-ENCODING: [0x00,0x80,0xeb,0x25]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 80 eb 25 <unknown>
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// --------------------------------------------------------------------------//
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// Test compatibility with MOVPRFX instruction.
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movprfx z0, z7
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// CHECK-INST: movprfx z0, z7
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// CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: e0 bc 20 04 <unknown>
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uqdecp z0.d, p0.d
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// CHECK-INST: uqdecp z0.d, p0.d
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// CHECK-ENCODING: [0x00,0x80,0xeb,0x25]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 80 eb 25 <unknown>
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