forked from OSchip/llvm-project
26 lines
986 B
ArmAsm
26 lines
986 B
ArmAsm
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
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fcvt z0.h, p0/m, z0.h
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: fcvt z0.h, p0/m, z0.h
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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fcvt z0.s, p0/m, z0.s
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: fcvt z0.s, p0/m, z0.s
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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fcvt z0.d, p0/m, z0.d
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
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// CHECK-NEXT: fcvt z0.d, p0/m, z0.d
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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// --------------------------------------------------------------------------//
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// error: invalid restricted predicate register, expected p0..p7 (without element suffix)
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fcvt z0.h, p8/m, z0.s
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// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
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// CHECK-NEXT: fcvt z0.h, p8/m, z0.s
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// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
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