forked from OSchip/llvm-project
55 lines
1.9 KiB
ArmAsm
55 lines
1.9 KiB
ArmAsm
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
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// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
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// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d --mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
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fabs z31.h, p7/m, z31.h
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// CHECK-INST: fabs z31.h, p7/m, z31.h
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// CHECK-ENCODING: [0xff,0xbf,0x5c,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff bf 5c 04 <unknown>
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fabs z31.s, p7/m, z31.s
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// CHECK-INST: fabs z31.s, p7/m, z31.s
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// CHECK-ENCODING: [0xff,0xbf,0x9c,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff bf 9c 04 <unknown>
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fabs z31.d, p7/m, z31.d
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// CHECK-INST: fabs z31.d, p7/m, z31.d
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// CHECK-ENCODING: [0xff,0xbf,0xdc,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff bf dc 04 <unknown>
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// --------------------------------------------------------------------------//
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// Test compatibility with MOVPRFX instruction.
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movprfx z4.d, p7/z, z6.d
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// CHECK-INST: movprfx z4.d, p7/z, z6.d
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// CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: c4 3c d0 04 <unknown>
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fabs z4.d, p7/m, z31.d
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// CHECK-INST: fabs z4.d, p7/m, z31.d
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// CHECK-ENCODING: [0xe4,0xbf,0xdc,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: e4 bf dc 04 <unknown>
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movprfx z4, z6
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// CHECK-INST: movprfx z4, z6
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// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
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fabs z4.d, p7/m, z31.d
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// CHECK-INST: fabs z4.d, p7/m, z31.d
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// CHECK-ENCODING: [0xe4,0xbf,0xdc,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: e4 bf dc 04 <unknown>
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