forked from OSchip/llvm-project
92 lines
4.8 KiB
LLVM
92 lines
4.8 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-apple-darwin10
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; rdar://7247745
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%struct._lck_mtx_ = type { %union.anon }
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%struct._lck_rw_t_internal_ = type <{ i16, i8, i8, i32, i32, i32 }>
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%struct.anon = type { i64, i64, [2 x i8], i8, i8, i32 }
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%struct.memory_object = type { i32, i32, %struct.memory_object_pager_ops* }
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%struct.memory_object_control = type { i32, i32, %struct.vm_object* }
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%struct.memory_object_pager_ops = type { void (%struct.memory_object*)*, void (%struct.memory_object*)*, i32 (%struct.memory_object*, %struct.memory_object_control*, i32)*, i32 (%struct.memory_object*)*, i32 (%struct.memory_object*, i64, i32, i32, i32*)*, i32 (%struct.memory_object*, i64, i32, i64*, i32*, i32, i32, i32)*, i32 (%struct.memory_object*, i64, i32)*, i32 (%struct.memory_object*, i64, i64, i32)*, i32 (%struct.memory_object*, i64, i64, i32)*, i32 (%struct.memory_object*, i32)*, i32 (%struct.memory_object*)*, i8* }
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%struct.queue_entry = type { %struct.queue_entry*, %struct.queue_entry* }
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%struct.upl = type { %struct._lck_mtx_, i32, i32, %struct.vm_object*, i64, i32, i64, %struct.vm_object*, i32, i8* }
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%struct.upl_page_info = type <{ i32, i8, [3 x i8] }>
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%struct.vm_object = type { %struct.queue_entry, %struct._lck_rw_t_internal_, i64, %struct.vm_page*, i32, i32, i32, i32, %struct.vm_object*, %struct.vm_object*, i64, %struct.memory_object*, i64, %struct.memory_object_control*, i32, i16, i16, [2 x i8], i8, i8, %struct.queue_entry, %struct.queue_entry, i64, i32, i32, i32, i8*, i64, i8, i8, [2 x i8], %struct.queue_entry }
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%struct.vm_page = type { %struct.queue_entry, %struct.queue_entry, %struct.vm_page*, %struct.vm_object*, i64, [2 x i8], i8, i8, i32, i8, i8, i8, i8, i32 }
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%union.anon = type { %struct.anon }
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declare i64 @OSAddAtomic64(i64, i64*) noredzone noimplicitfloat
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define i32 @upl_commit_range(%struct.upl* %upl, i32 %offset, i32 %size, i32 %flags, %struct.upl_page_info* %page_list, i32 %count, i32* nocapture %empty) nounwind noredzone noimplicitfloat {
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entry:
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br i1 undef, label %if.then, label %if.end
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if.end: ; preds = %entry
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br i1 undef, label %if.end143, label %if.then136
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if.then136: ; preds = %if.end
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unreachable
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if.end143: ; preds = %if.end
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br i1 undef, label %if.else155, label %if.then153
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if.then153: ; preds = %if.end143
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br label %while.cond
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if.else155: ; preds = %if.end143
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unreachable
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while.cond: ; preds = %if.end1039, %if.then153
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br i1 undef, label %if.then1138, label %while.body
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while.body: ; preds = %while.cond
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br i1 undef, label %if.end260, label %if.then217
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if.then217: ; preds = %while.body
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br i1 undef, label %if.end260, label %if.then230
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if.then230: ; preds = %if.then217
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br i1 undef, label %if.then246, label %if.end260
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if.then246: ; preds = %if.then230
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br label %if.end260
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if.end260: ; preds = %if.then246, %if.then230, %if.then217, %while.body
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br i1 undef, label %if.end296, label %if.then266
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if.then266: ; preds = %if.end260
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unreachable
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if.end296: ; preds = %if.end260
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br i1 undef, label %if.end1039, label %if.end306
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if.end306: ; preds = %if.end296
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br i1 undef, label %if.end796, label %if.then616
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if.then616: ; preds = %if.end306
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br i1 undef, label %commit_next_page, label %do.body716
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do.body716: ; preds = %if.then616
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%call721 = call i64 @OSAddAtomic64(i64 1, i64* undef) nounwind noredzone noimplicitfloat ; <i64> [#uses=0]
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call void asm sideeffect "movq\090x0($0),%rdi\0A\09movq\090x8($0),%rsi\0A\09.section __DATA, __data\0A\09.globl __dtrace_probeDOLLAR${:uid}4794___vminfo____pgrec\0A\09__dtrace_probeDOLLAR${:uid}4794___vminfo____pgrec:.quad 1f\0A\09.text\0A\091:nop\0A\09nop\0A\09nop\0A\09", "r,~{memory},~{di},~{si},~{dirflag},~{fpsr},~{flags}"(i64* undef) nounwind
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br label %commit_next_page
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if.end796: ; preds = %if.end306
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unreachable
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commit_next_page: ; preds = %do.body716, %if.then616
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br i1 undef, label %if.end1039, label %if.then1034
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if.then1034: ; preds = %commit_next_page
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br label %if.end1039
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if.end1039: ; preds = %if.then1034, %commit_next_page, %if.end296
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br label %while.cond
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if.then1138: ; preds = %while.cond
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unreachable
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if.then: ; preds = %entry
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ret i32 4
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}
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