forked from OSchip/llvm-project
86 lines
2.5 KiB
LLVM
86 lines
2.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
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; RUN: | FileCheck -check-prefix=RV32I %s
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; This test checks that LLVM can do basic stripping and reapplying of branches
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; to basic blocks.
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declare void @test_true()
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declare void @test_false()
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; !0 corresponds to a branch being taken, !1 to not being takne.
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!0 = !{!"branch_weights", i32 64, i32 4}
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!1 = !{!"branch_weights", i32 4, i32 64}
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define void @test_bcc_fallthrough_taken(i32 %in) nounwind {
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; RV32I-LABEL: test_bcc_fallthrough_taken:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp)
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; RV32I-NEXT: addi a1, zero, 42
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; RV32I-NEXT: bne a0, a1, .LBB0_3
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; RV32I-NEXT: # %bb.1: # %true
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; RV32I-NEXT: lui a0, %hi(test_true)
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; RV32I-NEXT: addi a0, a0, %lo(test_true)
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; RV32I-NEXT: .LBB0_2: # %true
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; RV32I-NEXT: jalr a0
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; RV32I-NEXT: lw ra, 12(sp)
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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; RV32I-NEXT: .LBB0_3: # %false
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; RV32I-NEXT: lui a0, %hi(test_false)
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; RV32I-NEXT: addi a0, a0, %lo(test_false)
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; RV32I-NEXT: j .LBB0_2
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%tst = icmp eq i32 %in, 42
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br i1 %tst, label %true, label %false, !prof !0
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; Expected layout order is: Entry, TrueBlock, FalseBlock
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; Entry->TrueBlock is the common path, which should be taken whenever the
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; conditional branch is false.
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true:
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call void @test_true()
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ret void
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false:
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call void @test_false()
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ret void
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}
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define void @test_bcc_fallthrough_nottaken(i32 %in) nounwind {
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; RV32I-LABEL: test_bcc_fallthrough_nottaken:
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; RV32I: # %bb.0:
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; RV32I-NEXT: addi sp, sp, -16
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; RV32I-NEXT: sw ra, 12(sp)
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; RV32I-NEXT: addi a1, zero, 42
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; RV32I-NEXT: beq a0, a1, .LBB1_3
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; RV32I-NEXT: # %bb.1: # %false
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; RV32I-NEXT: lui a0, %hi(test_false)
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; RV32I-NEXT: addi a0, a0, %lo(test_false)
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; RV32I-NEXT: .LBB1_2: # %true
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; RV32I-NEXT: jalr a0
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; RV32I-NEXT: lw ra, 12(sp)
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; RV32I-NEXT: addi sp, sp, 16
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; RV32I-NEXT: ret
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; RV32I-NEXT: .LBB1_3: # %true
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; RV32I-NEXT: lui a0, %hi(test_true)
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; RV32I-NEXT: addi a0, a0, %lo(test_true)
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; RV32I-NEXT: j .LBB1_2
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%tst = icmp eq i32 %in, 42
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br i1 %tst, label %true, label %false, !prof !1
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; Expected layout order is: Entry, FalseBlock, TrueBlock
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; Entry->FalseBlock is the common path, which should be taken whenever the
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; conditional branch is false
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true:
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call void @test_true()
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ret void
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false:
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call void @test_false()
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ret void
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}
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; TODO: how can we expand the coverage of the branch analysis functions?
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