forked from OSchip/llvm-project
78 lines
2.6 KiB
LLVM
78 lines
2.6 KiB
LLVM
; RUN: llc < %s -mtriple=armv7a-eabi | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-AT2
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; RUN: llc < %s -mtriple=thumbv7m-eabi | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-AT2
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; RUN: llc < %s -mtriple=thumbv6m-eabi | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-T1
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; This test checks that various kinds of getelementptr are all optimised to a
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; simple multiply plus add, with the add being done by a register offset if the
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; result is used in a load.
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; CHECK-LABEL: calc_1d:
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; CHECK: mov{{s?}} [[REG1:r[0-9]+]], #84
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; CHECK-AT2: mla r0, r1, [[REG1]], r0
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; CHECK-T1: muls [[REG2:r[0-9]+]], r1, [[REG1]]
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; CHECK-T1: adds r0, r0, [[REG2]]
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define i32* @calc_1d(i32* %p, i32 %n) {
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entry:
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%mul = mul nsw i32 %n, 21
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%add.ptr = getelementptr inbounds i32, i32* %p, i32 %mul
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ret i32* %add.ptr
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}
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; CHECK-LABEL: load_1d:
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; CHECK: mov{{s?}} [[REG1:r[0-9]+]], #84
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; CHECK: mul{{s?}} [[REG2:r[0-9]+]],{{( r1,)?}} [[REG1]]{{(, r1)?}}
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; CHECK: ldr r0, [r0, [[REG2]]]
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define i32 @load_1d(i32* %p, i32 %n) #1 {
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entry:
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%mul = mul nsw i32 %n, 21
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%arrayidx = getelementptr inbounds i32, i32* %p, i32 %mul
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%0 = load i32, i32* %arrayidx, align 4
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ret i32 %0
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}
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; CHECK-LABEL: calc_2d_a:
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; CHECK: mov{{s?}} [[REG1:r[0-9]+]], #84
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; CHECK-AT2: mla r0, r1, [[REG1]], r0
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; CHECK-T1: muls [[REG2:r[0-9]+]], r1, [[REG1]]
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; CHECK-T1: adds r0, r0, [[REG2]]
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define i32* @calc_2d_a([100 x i32]* %p, i32 %n) {
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entry:
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%mul = mul nsw i32 %n, 21
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%arrayidx1 = getelementptr inbounds [100 x i32], [100 x i32]* %p, i32 0, i32 %mul
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ret i32* %arrayidx1
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}
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; CHECK-LABEL: load_2d_a:
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; CHECK: mov{{s?}} [[REG1:r[0-9]+]], #84
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; CHECK: mul{{s?}} [[REG2:r[0-9]+]],{{( r1,)?}} [[REG1]]{{(, r1)?}}
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; CHECK: ldr r0, [r0, [[REG2]]]
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define i32 @load_2d_a([100 x i32]* %p, i32 %n) #1 {
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entry:
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%mul = mul nsw i32 %n, 21
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%arrayidx1 = getelementptr inbounds [100 x i32], [100 x i32]* %p, i32 0, i32 %mul
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%0 = load i32, i32* %arrayidx1, align 4
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ret i32 %0
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}
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; CHECK-LABEL: calc_2d_b:
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; CHECK: mov{{s?}} [[REG1:r[0-9]+]], #84
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; CHECK-AT2: mla r0, r1, [[REG1]], r0
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; CHECK-T1: muls [[REG2:r[0-9]+]], r1, [[REG1]]
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; CHECK-T1: adds r0, r0, [[REG2]]
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define i32* @calc_2d_b([21 x i32]* %p, i32 %n) {
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entry:
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%arrayidx1 = getelementptr inbounds [21 x i32], [21 x i32]* %p, i32 %n, i32 0
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ret i32* %arrayidx1
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}
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; CHECK-LABEL: load_2d_b:
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; CHECK: mov{{s?}} [[REG1:r[0-9]+]], #84
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; CHECK: mul{{s?}} [[REG2:r[0-9]+]],{{( r1,)?}} [[REG1]]{{(, r1)?}}
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; CHECK: ldr r0, [r0, [[REG2]]]
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define i32 @load_2d_b([21 x i32]* %p, i32 %n) {
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entry:
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%arrayidx1 = getelementptr inbounds [21 x i32], [21 x i32]* %p, i32 %n, i32 0
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%0 = load i32, i32* %arrayidx1, align 4
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ret i32 %0
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}
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