forked from OSchip/llvm-project
118 lines
3.9 KiB
LLVM
118 lines
3.9 KiB
LLVM
; RUN: llc -O1 -mcpu=cortex-a15 -mtriple=armv7-linux-gnueabi -disable-a15-sd-optimization -verify-machineinstrs < %s | FileCheck -check-prefix=CHECK-DISABLED %s
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; RUN: llc -O1 -mcpu=cortex-a15 -mtriple=armv7-linux-gnueabi -verify-machineinstrs < %s | FileCheck -check-prefix=CHECK-ENABLED %s
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; CHECK-ENABLED-LABEL: t1:
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; CHECK-DISABLED-LABEL: t1:
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define <2 x float> @t1(float %f) {
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; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d0[0]
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; CHECK-DISABLED-NOT: vdup.32 d{{[0-9]*}}, d0[0]
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%i1 = insertelement <2 x float> undef, float %f, i32 1
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%i2 = fadd <2 x float> %i1, %i1
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ret <2 x float> %i2
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}
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; CHECK-ENABLED-LABEL: t2:
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; CHECK-DISABLED-LABEL: t2:
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define <4 x float> @t2(float %g, float %f) {
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; CHECK-ENABLED: vdup.32 q{{[0-9]*}}, d0[0]
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; CHECK-DISABLED-NOT: vdup.32 d{{[0-9]*}}, d0[0]
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%i1 = insertelement <4 x float> undef, float %f, i32 1
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%i2 = fadd <4 x float> %i1, %i1
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ret <4 x float> %i2
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}
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; CHECK-ENABLED-LABEL: t3:
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; CHECK-DISABLED-LABEL: t3:
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define arm_aapcs_vfpcc <2 x float> @t3(float %f) {
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; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d0[0]
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; CHECK-DISABLED-NOT: vdup.32 d{{[0-9]*}}, d0[0]
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%i1 = insertelement <2 x float> undef, float %f, i32 1
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%i2 = fadd <2 x float> %i1, %i1
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ret <2 x float> %i2
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}
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; CHECK-ENABLED-LABEL: t4:
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; CHECK-DISABLED-LABEL: t4:
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define <2 x float> @t4(float %f) {
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; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d0[0]
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; CHECK-DISABLED-NOT: vdup
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%i1 = insertelement <2 x float> undef, float %f, i32 1
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br label %b
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; Block %b has an S-reg as live-in.
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b:
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%i2 = fadd <2 x float> %i1, %i1
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ret <2 x float> %i2
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}
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; CHECK-ENABLED-LABEL: t5:
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; CHECK-DISABLED-LABEL: t5:
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define arm_aapcs_vfpcc <4 x float> @t5(<4 x float> %q, float %f) {
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; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d{{[0-9]*}}[0]
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; CHECK-ENABLED: vadd.f32
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; CHECK-ENABLED-NEXT: bx lr
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; CHECK-DISABLED-NOT: vdup
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%i1 = insertelement <4 x float> %q, float %f, i32 1
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%i2 = fadd <4 x float> %i1, %i1
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ret <4 x float> %i2
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}
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; Test that DPair can be successfully passed as QPR.
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; CHECK-ENABLED-LABEL: test_DPair1:
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; CHECK-DISABLED-LABEL: test_DPair1:
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define void @test_DPair1(i32 %vsout, i8* nocapture %out, float %x, float %y) {
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entry:
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%0 = insertelement <4 x float> undef, float %x, i32 1
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%1 = insertelement <4 x float> %0, float %y, i32 0
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; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d{{[0-9]*}}[0]
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; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d{{[0-9]*}}[1]
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; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d{{[0-9]*}}[0]
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; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d{{[0-9]*}}[1]
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; CHECK-DISABLED-NOT: vdup
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switch i32 %vsout, label %sw.epilog [
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i32 1, label %sw.bb
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i32 0, label %sw.bb6
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]
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sw.bb: ; preds = %entry
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%2 = insertelement <4 x float> %1, float 0.000000e+00, i32 0
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br label %sw.bb6
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sw.bb6: ; preds = %sw.bb, %entry
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%sum.0 = phi <4 x float> [ %1, %entry ], [ %2, %sw.bb ]
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%3 = extractelement <4 x float> %sum.0, i32 0
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%conv = fptoui float %3 to i8
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store i8 %conv, i8* %out, align 1
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ret void
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sw.epilog: ; preds = %entry
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ret void
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}
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; CHECK-ENABLED-LABEL: test_DPair2:
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; CHECK-DISABLED-LABEL: test_DPair2:
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define void @test_DPair2(i32 %vsout, i8* nocapture %out, float %x) {
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entry:
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%0 = insertelement <4 x float> undef, float %x, i32 0
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; CHECK-ENABLED: vdup.32 q{{[0-9]*}}, d{{[0-9]*}}[0]
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; CHECK-DISABLED-NOT: vdup
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switch i32 %vsout, label %sw.epilog [
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i32 1, label %sw.bb
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i32 0, label %sw.bb1
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]
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sw.bb: ; preds = %entry
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%1 = insertelement <4 x float> %0, float 0.000000e+00, i32 0
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br label %sw.bb1
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sw.bb1: ; preds = %entry, %sw.bb
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%sum.0 = phi <4 x float> [ %0, %entry ], [ %1, %sw.bb ]
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%2 = extractelement <4 x float> %sum.0, i32 0
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%conv = fptoui float %2 to i8
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store i8 %conv, i8* %out, align 1
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br label %sw.epilog
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sw.epilog: ; preds = %entry, %sw.bb1
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ret void
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}
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