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Heejin Ahn c2ad096845 [MIRParser] Allow register class names in the form of integer/scalar 
Summary:
The current code cannot handle register class names like 'i32', which is
a valid register class name in WebAssembly. This patch removes special
handling for integer/scalar/pointer type parsing and treats them as
normal identifiers.

Reviewers: thegameg

Subscribers: jfb, dschuff, sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D45948

llvm-svn: 331586
 		2018-05-05 07:05:51 +00:00
..
AArch64 [MachineLICM] Debug intrinsics shouldn't affect hoist decisions 2018-05-04 19:25:09 +00:00
AMDGPU AMDGPU: Add D16 instructions preserve unused bits feature 2018-05-04 20:06:57 +00:00
ARC
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ARM ARM: don't try to over-align large vectors as arguments. 2018-05-03 12:54:25 +00:00
AVR [AVR] Add a regression test for struct return lowering 2018-03-20 11:23:03 +00:00
BPF bpf: fix incorrect SELECT_CC lowering 2018-04-03 03:56:37 +00:00
Generic Rename invariant.group.barrier to launder.invariant.group 2018-05-03 11:03:01 +00:00
Hexagon [Hexagon] Handle non-immediate constants in HexagonSplitDouble 2018-05-04 15:04:48 +00:00
Inputs
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Lanai
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MIR [MIRParser] Allow register class names in the form of integer/scalar 2018-05-05 07:05:51 +00:00
MSP430
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Mips Reland r331175: "[mips] Fix the predicates of jump and branch and link instructions" 2018-05-01 13:06:49 +00:00
NVPTX [NVPTX] Make the legalizer expand shufflevector of <2 x half> 2018-04-26 15:26:29 +00:00
Nios2
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PowerPC Fast Math Flag mapping into SDNode 2018-05-04 18:48:20 +00:00
RISCV [RISCV] Add remat.ll test case 2018-04-27 11:50:30 +00:00
SPARC [DAGCombiner] Set the right SDLoc on a newly-created zextload (1/N) 2018-05-01 19:26:15 +00:00
SystemZ [RegUsageInfoCollector] Bugfix for handling of register aliases. 2018-05-04 07:50:05 +00:00
Thumb Reapply ARM: Do not spill CSR to stack on entry to noreturn functions 2018-04-07 10:57:03 +00:00
Thumb2 MachO: trap unreachable instructions 2018-04-13 22:25:20 +00:00
WebAssembly [DAGCombiner] Fix a case of 1 in non-splat vector pow2 divisor 2018-04-27 22:23:11 +00:00
WinCFGuard
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WinEH
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X86 Mapping SDNode flags to MachineInstr flags 2018-05-04 23:41:15 +00:00
XCore Use .set instead of = when printing assignment in assembly output 2018-03-27 16:44:41 +00:00