forked from OSchip/llvm-project
38 lines
1.5 KiB
LLVM
38 lines
1.5 KiB
LLVM
; RUN: llc < %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-n32:64"
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target triple = "powerpc64le-unknown-linux-gnu"
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%struct.S0 = type <{ i32, [5 x i8] }>
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; Function Attrs: norecurse nounwind readnone
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define signext i32 @foo([2 x i64] %a.coerce) local_unnamed_addr #0 {
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entry:
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%a = alloca %struct.S0, align 8
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%a.coerce.fca.0.extract = extractvalue [2 x i64] %a.coerce, 0
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%a.coerce.fca.1.extract = extractvalue [2 x i64] %a.coerce, 1
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%a.0.a.0..sroa_cast = bitcast %struct.S0* %a to i64*
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store i64 %a.coerce.fca.0.extract, i64* %a.0.a.0..sroa_cast, align 8
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%tmp.sroa.2.0.extract.trunc = trunc i64 %a.coerce.fca.1.extract to i8
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%a.8.a.8..sroa_idx = getelementptr inbounds %struct.S0, %struct.S0* %a, i64 0, i32 1, i64 4
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store i8 %tmp.sroa.2.0.extract.trunc, i8* %a.8.a.8..sroa_idx, align 8
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%a.4.a.4..sroa_idx = getelementptr inbounds %struct.S0, %struct.S0* %a, i64 0, i32 1
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%a.4.a.4..sroa_cast = bitcast [5 x i8]* %a.4.a.4..sroa_idx to i40*
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%a.4.a.4.bf.load = load i40, i40* %a.4.a.4..sroa_cast, align 4
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%bf.lshr = lshr i40 %a.4.a.4.bf.load, 31
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%bf.lshr.tr = trunc i40 %bf.lshr to i32
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%bf.cast = and i32 %bf.lshr.tr, 127
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ret i32 %bf.cast
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; CHECK-LABEL: @foo
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; FIXME: We don't need to do these stores at all.
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; CHECK-DAG: std 3, -24(1)
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; CHECK-DAG: stb 4, -16(1)
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; CHECK-DAG: lwz [[REG2:[0-9]+]], -20(1)
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; CHECK-DAG: rlwinm 3, [[REG2]], 1, 31, 31
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; CHECK: rlwimi 3, 4, 1, 25, 30
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; CHECK: blr
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}
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attributes #0 = { nounwind "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "target-cpu"="ppc64le" }
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