llvm-project/llvm/lib/Transforms
Changpeng Fang 5f9154618e StructurizeCFG: Adjust the loop depth for a subregion to order the nodes correctly
Summary:
  StructurizeCFG::orderNodes basically uses a reverse post-order (RPO) traversal of the region list to get the order.
The only problem with it is that sometimes backedges for outer loops will be visited before backedges for inner loops.
To solve this problem, a loop depth based approach has been used to make sure all blocks in this loop has been visited
before moving on to outer loop.

However, we found a problem for a SubRegion which is a loop itself:

--> BB1 --> BB2 --> BB3 -->

In this case, BB2 is a SubRegion (loop), and thus its loopdepth is different than that of BB1 and BB3. This fact will lead
BB2 to be placed in the wrong order.

In this work, we treat the SubRegion as a special case and use its exit block to determine the loop and its depth
to guard the sorting.

Reviewers:
  arsenm, jlebar

Differential Revision:
  https://reviews.llvm.org/D46912

llvm-svn: 333111
2018-05-23 18:34:48 +00:00
..
AggressiveInstCombine [AggressiveInstCombine] avoid crashing on unsimplified code (PR37446) 2018-05-14 13:43:32 +00:00
Coroutines Rename DEBUG macro to LLVM_DEBUG. 2018-05-14 12:53:11 +00:00
Hello
IPO [Dominators] Add PDT constructor from Function 2018-05-23 17:29:21 +00:00
InstCombine [InstCombine] Fold unfolded masked merge pattern with variable mask! 2018-05-23 17:47:52 +00:00
Instrumentation [msan] Don't check divisor shadow in fdiv. 2018-05-18 20:19:53 +00:00
ObjCARC [WebAssembly] Add Wasm personality and isScopedEHPersonality() 2018-05-17 20:52:03 +00:00
Scalar StructurizeCFG: Adjust the loop depth for a subregion to order the nodes correctly 2018-05-23 18:34:48 +00:00
Utils [InstCombine] use nsw negation for abs libcalls 2018-05-22 23:29:40 +00:00
Vectorize Remove DEBUG macro. 2018-05-23 15:09:29 +00:00
CMakeLists.txt Another try to commit 323321 (aggressive instruction combine). 2018-01-25 12:06:32 +00:00
LLVMBuild.txt Another try to commit 323321 (aggressive instruction combine). 2018-01-25 12:06:32 +00:00