forked from OSchip/llvm-project
91 lines
3.2 KiB
LLVM
91 lines
3.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -newgvn -S < %s | FileCheck %s
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; RUN: opt -passes=newgvn -S -o - %s | FileCheck %s
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target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
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;; All the loads in this testcase are useless, but it requires understanding that repeated
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;; stores of the same value do not change the memory state to eliminate them.
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define i32 @foo(i32*, i32) {
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; CHECK-LABEL: @foo(
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; CHECK-NEXT: store i32 5, i32* [[TMP0:%.*]], align 4
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; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP1:%.*]], 0
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; CHECK-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP5:%.*]]
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; CHECK: br label [[TMP5]]
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; CHECK: [[DOT0:%.*]] = phi i32 [ 10, [[TMP4]] ], [ 5, [[TMP2:%.*]] ]
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; CHECK-NEXT: br i1 [[TMP3]], label [[TMP6:%.*]], label [[TMP8:%.*]]
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; CHECK: [[TMP7:%.*]] = add nsw i32 [[DOT0]], 5
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; CHECK-NEXT: br label [[TMP8]]
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; CHECK: [[DOT1:%.*]] = phi i32 [ [[TMP7]], [[TMP6]] ], [ [[DOT0]], [[TMP5]] ]
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; CHECK-NEXT: ret i32 [[DOT1]]
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;
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store i32 5, i32* %0, align 4
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%3 = icmp ne i32 %1, 0
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br i1 %3, label %4, label %7
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; <label>:4: ; preds = %2
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%5 = load i32, i32* %0, align 4
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%6 = add nsw i32 5, %5
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br label %7
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; <label>:7: ; preds = %4, %2
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%.0 = phi i32 [ %6, %4 ], [ 5, %2 ]
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store i32 5, i32* %0, align 4
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%8 = icmp ne i32 %1, 0
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br i1 %8, label %9, label %12
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; <label>:9: ; preds = %7
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%10 = load i32, i32* %0, align 4
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%11 = add nsw i32 %.0, %10
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br label %12
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; <label>:12: ; preds = %9, %7
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%.1 = phi i32 [ %11, %9 ], [ %.0, %7 ]
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ret i32 %.1
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}
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;; This is similar to the above, but it is a conditional store of the same value
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;; which requires value numbering MemoryPhi properly to resolve.
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define i32 @foo2(i32*, i32) {
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; CHECK-LABEL: @foo2(
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; CHECK-NEXT: store i32 5, i32* [[TMP0:%.*]], align 4
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; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP1:%.*]], 0
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; CHECK-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP5:%.*]]
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; CHECK: br label [[TMP6:%.*]]
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; CHECK: br label [[TMP6]]
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; CHECK: [[DOT0:%.*]] = phi i32 [ 10, [[TMP4]] ], [ 5, [[TMP5]] ]
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; CHECK-NEXT: br i1 [[TMP3]], label [[TMP7:%.*]], label [[TMP9:%.*]]
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; CHECK: [[TMP8:%.*]] = add nsw i32 [[DOT0]], 5
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; CHECK-NEXT: br label [[TMP9]]
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; CHECK: [[DOT1:%.*]] = phi i32 [ [[TMP8]], [[TMP7]] ], [ [[DOT0]], [[TMP6]] ]
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; CHECK-NEXT: ret i32 [[DOT1]]
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;
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store i32 5, i32* %0, align 4
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%3 = icmp ne i32 %1, 0
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br i1 %3, label %4, label %7
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; <label>:4: ; preds = %2
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%5 = load i32, i32* %0, align 4
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%6 = add nsw i32 5, %5
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br label %8
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; <label>:7: ; preds = %2
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store i32 5, i32* %0, align 4
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br label %8
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; <label>:8: ; preds = %7, %4
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%.0 = phi i32 [ %6, %4 ], [ 5, %7 ]
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%9 = icmp ne i32 %1, 0
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br i1 %9, label %10, label %13
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; <label>:10: ; preds = %8
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%11 = load i32, i32* %0, align 4
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%12 = add nsw i32 %.0, %11
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br label %13
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; <label>:13: ; preds = %10, %8
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%.1 = phi i32 [ %12, %10 ], [ %.0, %8 ]
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ret i32 %.1
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}
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