forked from OSchip/llvm-project
129 lines
4.7 KiB
LLVM
129 lines
4.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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declare i32 @llvm.abs.i32(i32, i1)
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declare <4 x i32> @llvm.abs.v4i32(<4 x i32>, i1)
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; abs preserves trailing zeros so the second and is unneeded
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define i32 @abs_trailing_zeros(i32 %x) {
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; CHECK-LABEL: @abs_trailing_zeros(
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], -4
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; CHECK-NEXT: [[ABS:%.*]] = call i32 @llvm.abs.i32(i32 [[AND]], i1 false)
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; CHECK-NEXT: ret i32 [[ABS]]
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;
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%and = and i32 %x, -4
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%abs = call i32 @llvm.abs.i32(i32 %and, i1 false)
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%and2 = and i32 %abs, -2
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ret i32 %and2
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}
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define <4 x i32> @abs_trailing_zeros_vec(<4 x i32> %x) {
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; CHECK-LABEL: @abs_trailing_zeros_vec(
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; CHECK-NEXT: [[AND:%.*]] = and <4 x i32> [[X:%.*]], <i32 -4, i32 -8, i32 -16, i32 -32>
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; CHECK-NEXT: [[ABS:%.*]] = call <4 x i32> @llvm.abs.v4i32(<4 x i32> [[AND]], i1 false)
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; CHECK-NEXT: ret <4 x i32> [[ABS]]
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;
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%and = and <4 x i32> %x, <i32 -4, i32 -8, i32 -16, i32 -32>
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%abs = call <4 x i32> @llvm.abs.v4i32(<4 x i32> %and, i1 false)
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%and2 = and <4 x i32> %abs, <i32 -2, i32 -2, i32 -2, i32 -2>
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ret <4 x i32> %and2
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}
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; negative test, can't remove the second and based on trailing zeroes.
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; FIXME: Could remove the first and using demanded bits.
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define i32 @abs_trailing_zeros_negative(i32 %x) {
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; CHECK-LABEL: @abs_trailing_zeros_negative(
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], -2
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; CHECK-NEXT: [[ABS:%.*]] = call i32 @llvm.abs.i32(i32 [[AND]], i1 false)
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; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ABS]], -4
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; CHECK-NEXT: ret i32 [[AND2]]
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;
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%and = and i32 %x, -2
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%abs = call i32 @llvm.abs.i32(i32 %and, i1 false)
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%and2 = and i32 %abs, -4
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ret i32 %and2
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}
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define <4 x i32> @abs_trailing_zeros_negative_vec(<4 x i32> %x) {
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; CHECK-LABEL: @abs_trailing_zeros_negative_vec(
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; CHECK-NEXT: [[AND:%.*]] = and <4 x i32> [[X:%.*]], <i32 -2, i32 -2, i32 -2, i32 -2>
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; CHECK-NEXT: [[ABS:%.*]] = call <4 x i32> @llvm.abs.v4i32(<4 x i32> [[AND]], i1 false)
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; CHECK-NEXT: [[AND2:%.*]] = and <4 x i32> [[ABS]], <i32 -4, i32 -4, i32 -4, i32 -4>
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; CHECK-NEXT: ret <4 x i32> [[AND2]]
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;
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%and = and <4 x i32> %x, <i32 -2, i32 -2, i32 -2, i32 -2>
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%abs = call <4 x i32> @llvm.abs.v4i32(<4 x i32> %and, i1 false)
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%and2 = and <4 x i32> %abs, <i32 -4, i32 -4, i32 -4, i32 -4>
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ret <4 x i32> %and2
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}
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; Make sure we infer this add doesn't overflow. The input to the abs has 3
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; sign bits, the abs reduces this to 2 sign bits.
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define i32 @abs_signbits(i30 %x) {
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; CHECK-LABEL: @abs_signbits(
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; CHECK-NEXT: [[EXT:%.*]] = sext i30 [[X:%.*]] to i32
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; CHECK-NEXT: [[ABS:%.*]] = call i32 @llvm.abs.i32(i32 [[EXT]], i1 false)
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; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[ABS]], 1
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; CHECK-NEXT: ret i32 [[ADD]]
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;
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%ext = sext i30 %x to i32
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%abs = call i32 @llvm.abs.i32(i32 %ext, i1 false)
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%add = add i32 %abs, 1
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ret i32 %add
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}
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define <4 x i32> @abs_signbits_vec(<4 x i30> %x) {
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; CHECK-LABEL: @abs_signbits_vec(
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; CHECK-NEXT: [[EXT:%.*]] = sext <4 x i30> [[X:%.*]] to <4 x i32>
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; CHECK-NEXT: [[ABS:%.*]] = call <4 x i32> @llvm.abs.v4i32(<4 x i32> [[EXT]], i1 false)
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; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw <4 x i32> [[ABS]], <i32 1, i32 1, i32 1, i32 1>
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; CHECK-NEXT: ret <4 x i32> [[ADD]]
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;
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%ext = sext <4 x i30> %x to <4 x i32>
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%abs = call <4 x i32> @llvm.abs.v4i32(<4 x i32> %ext, i1 false)
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%add = add <4 x i32> %abs, <i32 1, i32 1, i32 1, i32 1>
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ret <4 x i32> %add
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}
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define i32 @abs_of_neg(i32 %x) {
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; CHECK-LABEL: @abs_of_neg(
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; CHECK-NEXT: [[B:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
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; CHECK-NEXT: ret i32 [[B]]
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;
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%a = sub i32 0, %x
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%b = call i32 @llvm.abs.i32(i32 %a, i1 false)
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ret i32 %b
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}
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define <4 x i32> @abs_of_neg_vec(<4 x i32> %x) {
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; CHECK-LABEL: @abs_of_neg_vec(
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; CHECK-NEXT: [[B:%.*]] = call <4 x i32> @llvm.abs.v4i32(<4 x i32> [[X:%.*]], i1 false)
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; CHECK-NEXT: ret <4 x i32> [[B]]
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;
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%a = sub nsw <4 x i32> zeroinitializer, %x
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%b = call <4 x i32> @llvm.abs.v4i32(<4 x i32> %a, i1 false)
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ret <4 x i32> %b
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}
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define i32 @abs_of_select_neg_true_val(i1 %b, i32 %x) {
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; CHECK-LABEL: @abs_of_select_neg_true_val(
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; CHECK-NEXT: [[ABS:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 true)
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; CHECK-NEXT: ret i32 [[ABS]]
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;
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%neg = sub i32 0, %x
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%sel = select i1 %b, i32 %neg, i32 %x
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%abs = call i32 @llvm.abs.i32(i32 %sel, i1 true)
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ret i32 %abs
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}
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define <4 x i32> @abs_of_select_neg_false_val(<4 x i1> %b, <4 x i32> %x) {
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; CHECK-LABEL: @abs_of_select_neg_false_val(
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; CHECK-NEXT: [[ABS:%.*]] = call <4 x i32> @llvm.abs.v4i32(<4 x i32> [[X:%.*]], i1 false)
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; CHECK-NEXT: ret <4 x i32> [[ABS]]
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;
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%neg = sub <4 x i32> zeroinitializer, %x
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%sel = select <4 x i1> %b, <4 x i32> %x, <4 x i32> %neg
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%abs = call <4 x i32> @llvm.abs.v4i32(<4 x i32> %sel, i1 false)
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ret <4 x i32> %abs
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}
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