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llvm-project/llvm/test/CodeGen
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Martin Elshuber fef3036d37 Subject: [PATCH] [CodeGen] Add pass to combine interleaved loads. 
This patch defines an interleaved-load-combine pass. The pass searches
for ShuffleVector instructions that represent interleaved loads. Matches are
converted such that they will be captured by the InterleavedAccessPass.

The pass extends LLVMs capabilities to use target specific instruction
selection of interleaved load patterns (e.g.: ld4 on Aarch64
architectures).

Differential Revision: https://reviews.llvm.org/D52653

llvm-svn: 347208
 		2018-11-19 14:26:10 +00:00
..
AArch64 Subject: [PATCH] [CodeGen] Add pass to combine interleaved loads. 2018-11-19 14:26:10 +00:00
AMDGPU [DAG] add undef simplifications for select nodes 2018-11-18 17:36:23 +00:00
ARC
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ARM [ARM] Remove trunc sinks in ARM CGP 2018-11-19 11:34:40 +00:00
AVR [AVR] Reorder the CHECK lines in directmem.ll to match current trunk 2018-11-09 23:17:59 +00:00
BPF [bpf] Test case for symbol information in object file 2018-09-22 17:31:01 +00:00
Generic Moved dag-combine-select-undef.ll into amdgpu. NFC. 2018-11-17 00:17:15 +00:00
Hexagon [Hexagon] make tests immune to improvements in undef simplification 2018-11-18 16:50:16 +00:00
Inputs
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Lanai
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MIR [Power9] Allow gpr callee saved spills in prologue to vectors registers 2018-11-09 16:36:24 +00:00
MSP430 [MSP430] Optimize srl/sra in case of A >> (8 + N) 2018-11-19 10:43:02 +00:00
Mips [DAGCombiner][X86][Mips] Enable combineShuffleOfScalars to run between vector op legalization and DAG legalization. Fix bad one use check in combineShuffleOfScalars 2018-11-09 18:04:34 +00:00
NVPTX
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Nios2
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PowerPC [PowerPC][NFC] Add tests for vector fp <-> int conversions 2018-11-16 20:24:10 +00:00
RISCV [RISCV] Constant materialisation for RV64I 2018-11-16 10:14:16 +00:00
SPARC Relax fast register allocator related test cases; NFC 2018-10-29 20:10:42 +00:00
SystemZ [SystemZ] make test immune to improvements in undef simplification 2018-11-18 16:50:44 +00:00
Thumb [SelectionDAG] swap select_cc operands to enable folding 2018-11-09 11:09:40 +00:00
Thumb2 [ARM] Enable spilling of the hGPR register class in Thumb2 2018-11-08 13:02:10 +00:00
WebAssembly [WebAssembly] Add null streamer support 2018-11-18 11:58:47 +00:00
WinCFGuard [COFF] Emit @feat.00 on 64-bit and set the CFG bit when emitting guardcf tables 2018-09-19 09:58:30 +00:00
WinEH
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X86 [X86] Add codegen tests for slow-shld scalar funnel shifts 2018-11-19 12:29:41 +00:00
XCore Relax fast register allocator related test cases; NFC 2018-10-29 20:10:42 +00:00