forked from OSchip/llvm-project
411 lines
16 KiB
LLVM
411 lines
16 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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define i32 @foo(i32 %a, i32 %b, i32 %c, i32 %d) {
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; CHECK-LABEL: @foo(
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; CHECK-NEXT: [[E:%.*]] = icmp slt i32 %a, %b
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; CHECK-NEXT: [[J:%.*]] = select i1 [[E]], i32 %c, i32 %d
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; CHECK-NEXT: ret i32 [[J]]
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;
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%e = icmp slt i32 %a, %b
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%f = sext i1 %e to i32
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%g = and i32 %c, %f
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%h = xor i32 %f, -1
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%i = and i32 %d, %h
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%j = or i32 %g, %i
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ret i32 %j
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}
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define i32 @bar(i32 %a, i32 %b, i32 %c, i32 %d) {
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; CHECK-LABEL: @bar(
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; CHECK-NEXT: [[E:%.*]] = icmp slt i32 %a, %b
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; CHECK-NEXT: [[J:%.*]] = select i1 [[E]], i32 %c, i32 %d
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; CHECK-NEXT: ret i32 [[J]]
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;
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%e = icmp slt i32 %a, %b
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%f = sext i1 %e to i32
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%g = and i32 %c, %f
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%h = xor i32 %f, -1
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%i = and i32 %d, %h
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%j = or i32 %i, %g
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ret i32 %j
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}
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define i32 @goo(i32 %a, i32 %b, i32 %c, i32 %d) {
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; CHECK-LABEL: @goo(
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; CHECK-NEXT: [[T0:%.*]] = icmp slt i32 %a, %b
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; CHECK-NEXT: [[T3:%.*]] = select i1 [[T0]], i32 %c, i32 %d
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; CHECK-NEXT: ret i32 [[T3]]
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;
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%t0 = icmp slt i32 %a, %b
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%iftmp.0.0 = select i1 %t0, i32 -1, i32 0
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%t1 = and i32 %iftmp.0.0, %c
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%not = xor i32 %iftmp.0.0, -1
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%t2 = and i32 %not, %d
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%t3 = or i32 %t1, %t2
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ret i32 %t3
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}
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define i32 @poo(i32 %a, i32 %b, i32 %c, i32 %d) {
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; CHECK-LABEL: @poo(
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; CHECK-NEXT: [[T0:%.*]] = icmp slt i32 %a, %b
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; CHECK-NEXT: [[T3:%.*]] = select i1 [[T0]], i32 %c, i32 %d
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; CHECK-NEXT: ret i32 [[T3]]
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;
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%t0 = icmp slt i32 %a, %b
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%iftmp.0.0 = select i1 %t0, i32 -1, i32 0
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%t1 = and i32 %iftmp.0.0, %c
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%iftmp = select i1 %t0, i32 0, i32 -1
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%t2 = and i32 %iftmp, %d
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%t3 = or i32 %t1, %t2
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ret i32 %t3
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}
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define i32 @par(i32 %a, i32 %b, i32 %c, i32 %d) {
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; CHECK-LABEL: @par(
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; CHECK-NEXT: [[T0:%.*]] = icmp slt i32 %a, %b
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; CHECK-NEXT: [[T3:%.*]] = select i1 [[T0]], i32 %c, i32 %d
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; CHECK-NEXT: ret i32 [[T3]]
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;
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%t0 = icmp slt i32 %a, %b
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%iftmp.1.0 = select i1 %t0, i32 -1, i32 0
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%t1 = and i32 %iftmp.1.0, %c
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%not = xor i32 %iftmp.1.0, -1
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%t2 = and i32 %not, %d
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%t3 = or i32 %t1, %t2
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ret i32 %t3
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}
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; In the following tests (8 commutation variants), verify that a bitcast doesn't get
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; in the way of a select transform. These bitcasts are common in SSE/AVX and possibly
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; other vector code because of canonicalization to i64 elements for vectors.
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; The fptosi instructions are included to avoid commutation canonicalization based on
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; operator weight. Using another cast operator ensures that both operands of all logic
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; ops are equally weighted, and this ensures that we're testing all commutation
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; possibilities.
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define <2 x i64> @bitcast_select_swap0(<4 x i1> %cmp, <2 x double> %a, <2 x double> %b) {
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; CHECK-LABEL: @bitcast_select_swap0(
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; CHECK-NEXT: [[SIA:%.*]] = fptosi <2 x double> %a to <2 x i64>
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; CHECK-NEXT: [[SIB:%.*]] = fptosi <2 x double> %b to <2 x i64>
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[SIA]] to <4 x i32>
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; CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[SIB]] to <4 x i32>
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; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> %cmp, <4 x i32> [[TMP1]], <4 x i32> [[TMP2]]
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; CHECK-NEXT: [[OR:%.*]] = bitcast <4 x i32> [[TMP3]] to <2 x i64>
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; CHECK-NEXT: ret <2 x i64> [[OR]]
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;
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%sia = fptosi <2 x double> %a to <2 x i64>
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%sib = fptosi <2 x double> %b to <2 x i64>
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%sext = sext <4 x i1> %cmp to <4 x i32>
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%bc1 = bitcast <4 x i32> %sext to <2 x i64>
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%and1 = and <2 x i64> %bc1, %sia
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%neg = xor <4 x i32> %sext, <i32 -1, i32 -1, i32 -1, i32 -1>
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%bc2 = bitcast <4 x i32> %neg to <2 x i64>
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%and2 = and <2 x i64> %bc2, %sib
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%or = or <2 x i64> %and1, %and2
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ret <2 x i64> %or
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}
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define <2 x i64> @bitcast_select_swap1(<4 x i1> %cmp, <2 x double> %a, <2 x double> %b) {
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; CHECK-LABEL: @bitcast_select_swap1(
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; CHECK-NEXT: [[SIA:%.*]] = fptosi <2 x double> %a to <2 x i64>
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; CHECK-NEXT: [[SIB:%.*]] = fptosi <2 x double> %b to <2 x i64>
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[SIA]] to <4 x i32>
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; CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[SIB]] to <4 x i32>
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; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> %cmp, <4 x i32> [[TMP1]], <4 x i32> [[TMP2]]
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; CHECK-NEXT: [[OR:%.*]] = bitcast <4 x i32> [[TMP3]] to <2 x i64>
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; CHECK-NEXT: ret <2 x i64> [[OR]]
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;
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%sia = fptosi <2 x double> %a to <2 x i64>
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%sib = fptosi <2 x double> %b to <2 x i64>
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%sext = sext <4 x i1> %cmp to <4 x i32>
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%bc1 = bitcast <4 x i32> %sext to <2 x i64>
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%and1 = and <2 x i64> %bc1, %sia
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%neg = xor <4 x i32> %sext, <i32 -1, i32 -1, i32 -1, i32 -1>
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%bc2 = bitcast <4 x i32> %neg to <2 x i64>
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%and2 = and <2 x i64> %bc2, %sib
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%or = or <2 x i64> %and2, %and1
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ret <2 x i64> %or
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}
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define <2 x i64> @bitcast_select_swap2(<4 x i1> %cmp, <2 x double> %a, <2 x double> %b) {
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; CHECK-LABEL: @bitcast_select_swap2(
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; CHECK-NEXT: [[SIA:%.*]] = fptosi <2 x double> %a to <2 x i64>
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; CHECK-NEXT: [[SIB:%.*]] = fptosi <2 x double> %b to <2 x i64>
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[SIA]] to <4 x i32>
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; CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[SIB]] to <4 x i32>
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; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> %cmp, <4 x i32> [[TMP1]], <4 x i32> [[TMP2]]
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; CHECK-NEXT: [[OR:%.*]] = bitcast <4 x i32> [[TMP3]] to <2 x i64>
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; CHECK-NEXT: ret <2 x i64> [[OR]]
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;
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%sia = fptosi <2 x double> %a to <2 x i64>
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%sib = fptosi <2 x double> %b to <2 x i64>
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%sext = sext <4 x i1> %cmp to <4 x i32>
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%bc1 = bitcast <4 x i32> %sext to <2 x i64>
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%and1 = and <2 x i64> %bc1, %sia
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%neg = xor <4 x i32> %sext, <i32 -1, i32 -1, i32 -1, i32 -1>
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%bc2 = bitcast <4 x i32> %neg to <2 x i64>
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%and2 = and <2 x i64> %sib, %bc2
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%or = or <2 x i64> %and1, %and2
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ret <2 x i64> %or
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}
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define <2 x i64> @bitcast_select_swap3(<4 x i1> %cmp, <2 x double> %a, <2 x double> %b) {
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; CHECK-LABEL: @bitcast_select_swap3(
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; CHECK-NEXT: [[SIA:%.*]] = fptosi <2 x double> %a to <2 x i64>
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; CHECK-NEXT: [[SIB:%.*]] = fptosi <2 x double> %b to <2 x i64>
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[SIA]] to <4 x i32>
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; CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[SIB]] to <4 x i32>
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; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> %cmp, <4 x i32> [[TMP1]], <4 x i32> [[TMP2]]
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; CHECK-NEXT: [[OR:%.*]] = bitcast <4 x i32> [[TMP3]] to <2 x i64>
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; CHECK-NEXT: ret <2 x i64> [[OR]]
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;
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%sia = fptosi <2 x double> %a to <2 x i64>
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%sib = fptosi <2 x double> %b to <2 x i64>
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%sext = sext <4 x i1> %cmp to <4 x i32>
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%bc1 = bitcast <4 x i32> %sext to <2 x i64>
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%and1 = and <2 x i64> %bc1, %sia
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%neg = xor <4 x i32> %sext, <i32 -1, i32 -1, i32 -1, i32 -1>
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%bc2 = bitcast <4 x i32> %neg to <2 x i64>
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%and2 = and <2 x i64> %sib, %bc2
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%or = or <2 x i64> %and2, %and1
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ret <2 x i64> %or
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}
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define <2 x i64> @bitcast_select_swap4(<4 x i1> %cmp, <2 x double> %a, <2 x double> %b) {
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; CHECK-LABEL: @bitcast_select_swap4(
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; CHECK-NEXT: [[SIA:%.*]] = fptosi <2 x double> %a to <2 x i64>
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; CHECK-NEXT: [[SIB:%.*]] = fptosi <2 x double> %b to <2 x i64>
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[SIA]] to <4 x i32>
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; CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[SIB]] to <4 x i32>
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; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> %cmp, <4 x i32> [[TMP1]], <4 x i32> [[TMP2]]
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; CHECK-NEXT: [[OR:%.*]] = bitcast <4 x i32> [[TMP3]] to <2 x i64>
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; CHECK-NEXT: ret <2 x i64> [[OR]]
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;
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%sia = fptosi <2 x double> %a to <2 x i64>
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%sib = fptosi <2 x double> %b to <2 x i64>
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%sext = sext <4 x i1> %cmp to <4 x i32>
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%bc1 = bitcast <4 x i32> %sext to <2 x i64>
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%and1 = and <2 x i64> %sia, %bc1
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%neg = xor <4 x i32> %sext, <i32 -1, i32 -1, i32 -1, i32 -1>
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%bc2 = bitcast <4 x i32> %neg to <2 x i64>
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%and2 = and <2 x i64> %bc2, %sib
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%or = or <2 x i64> %and1, %and2
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ret <2 x i64> %or
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}
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define <2 x i64> @bitcast_select_swap5(<4 x i1> %cmp, <2 x double> %a, <2 x double> %b) {
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; CHECK-LABEL: @bitcast_select_swap5(
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; CHECK-NEXT: [[SIA:%.*]] = fptosi <2 x double> %a to <2 x i64>
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; CHECK-NEXT: [[SIB:%.*]] = fptosi <2 x double> %b to <2 x i64>
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[SIA]] to <4 x i32>
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; CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[SIB]] to <4 x i32>
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; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> %cmp, <4 x i32> [[TMP1]], <4 x i32> [[TMP2]]
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; CHECK-NEXT: [[OR:%.*]] = bitcast <4 x i32> [[TMP3]] to <2 x i64>
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; CHECK-NEXT: ret <2 x i64> [[OR]]
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;
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%sia = fptosi <2 x double> %a to <2 x i64>
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%sib = fptosi <2 x double> %b to <2 x i64>
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%sext = sext <4 x i1> %cmp to <4 x i32>
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%bc1 = bitcast <4 x i32> %sext to <2 x i64>
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%and1 = and <2 x i64> %sia, %bc1
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%neg = xor <4 x i32> %sext, <i32 -1, i32 -1, i32 -1, i32 -1>
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%bc2 = bitcast <4 x i32> %neg to <2 x i64>
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%and2 = and <2 x i64> %bc2, %sib
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%or = or <2 x i64> %and2, %and1
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ret <2 x i64> %or
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}
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define <2 x i64> @bitcast_select_swap6(<4 x i1> %cmp, <2 x double> %a, <2 x double> %b) {
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; CHECK-LABEL: @bitcast_select_swap6(
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; CHECK-NEXT: [[SIA:%.*]] = fptosi <2 x double> %a to <2 x i64>
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; CHECK-NEXT: [[SIB:%.*]] = fptosi <2 x double> %b to <2 x i64>
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[SIA]] to <4 x i32>
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; CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[SIB]] to <4 x i32>
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; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> %cmp, <4 x i32> [[TMP1]], <4 x i32> [[TMP2]]
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; CHECK-NEXT: [[OR:%.*]] = bitcast <4 x i32> [[TMP3]] to <2 x i64>
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; CHECK-NEXT: ret <2 x i64> [[OR]]
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;
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%sia = fptosi <2 x double> %a to <2 x i64>
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%sib = fptosi <2 x double> %b to <2 x i64>
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%sext = sext <4 x i1> %cmp to <4 x i32>
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%bc1 = bitcast <4 x i32> %sext to <2 x i64>
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%and1 = and <2 x i64> %sia, %bc1
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%neg = xor <4 x i32> %sext, <i32 -1, i32 -1, i32 -1, i32 -1>
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%bc2 = bitcast <4 x i32> %neg to <2 x i64>
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%and2 = and <2 x i64> %sib, %bc2
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%or = or <2 x i64> %and1, %and2
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ret <2 x i64> %or
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}
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define <2 x i64> @bitcast_select_swap7(<4 x i1> %cmp, <2 x double> %a, <2 x double> %b) {
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; CHECK-LABEL: @bitcast_select_swap7(
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; CHECK-NEXT: [[SIA:%.*]] = fptosi <2 x double> %a to <2 x i64>
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; CHECK-NEXT: [[SIB:%.*]] = fptosi <2 x double> %b to <2 x i64>
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[SIA]] to <4 x i32>
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; CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[SIB]] to <4 x i32>
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; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> %cmp, <4 x i32> [[TMP1]], <4 x i32> [[TMP2]]
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; CHECK-NEXT: [[OR:%.*]] = bitcast <4 x i32> [[TMP3]] to <2 x i64>
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; CHECK-NEXT: ret <2 x i64> [[OR]]
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;
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%sia = fptosi <2 x double> %a to <2 x i64>
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%sib = fptosi <2 x double> %b to <2 x i64>
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%sext = sext <4 x i1> %cmp to <4 x i32>
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%bc1 = bitcast <4 x i32> %sext to <2 x i64>
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%and1 = and <2 x i64> %sia, %bc1
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%neg = xor <4 x i32> %sext, <i32 -1, i32 -1, i32 -1, i32 -1>
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%bc2 = bitcast <4 x i32> %neg to <2 x i64>
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%and2 = and <2 x i64> %sib, %bc2
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%or = or <2 x i64> %and2, %and1
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ret <2 x i64> %or
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}
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define i1 @bools(i1 %a, i1 %b, i1 %c) {
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; CHECK-LABEL: @bools(
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; CHECK-NEXT: [[TMP1:%.*]] = select i1 %c, i1 %b, i1 %a
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; CHECK-NEXT: ret i1 [[TMP1]]
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;
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%not = xor i1 %c, -1
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%and1 = and i1 %not, %a
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%and2 = and i1 %c, %b
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%or = or i1 %and1, %and2
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ret i1 %or
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}
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; Form a select if we know we can get replace 2 simple logic ops.
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define i1 @bools_multi_uses1(i1 %a, i1 %b, i1 %c) {
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; CHECK-LABEL: @bools_multi_uses1(
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; CHECK-NEXT: [[NOT:%.*]] = xor i1 %c, true
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; CHECK-NEXT: [[AND1:%.*]] = and i1 [[NOT]], %a
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; CHECK-NEXT: [[TMP1:%.*]] = select i1 %c, i1 %b, i1 %a
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; CHECK-NEXT: [[XOR:%.*]] = xor i1 [[TMP1]], [[AND1]]
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; CHECK-NEXT: ret i1 [[XOR]]
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;
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%not = xor i1 %c, -1
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%and1 = and i1 %not, %a
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%and2 = and i1 %c, %b
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%or = or i1 %and1, %and2
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%xor = xor i1 %or, %and1
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ret i1 %xor
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}
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; FIXME: Don't replace a cheap logic op with a potentially expensive select
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; unless we can also eliminate one of the other original ops.
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define i1 @bools_multi_uses2(i1 %a, i1 %b, i1 %c) {
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; CHECK-LABEL: @bools_multi_uses2(
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; CHECK-NEXT: [[NOT:%.*]] = xor i1 %c, true
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; CHECK-NEXT: [[AND1:%.*]] = and i1 [[NOT]], %a
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; CHECK-NEXT: [[AND2:%.*]] = and i1 %c, %b
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; CHECK-NEXT: [[ADD:%.*]] = xor i1 [[AND1]], [[AND2]]
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; CHECK-NEXT: ret i1 [[ADD]]
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;
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%not = xor i1 %c, -1
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%and1 = and i1 %not, %a
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%and2 = and i1 %c, %b
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%or = or i1 %and1, %and2
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%add = add i1 %and1, %and2
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%and3 = and i1 %or, %add
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ret i1 %and3
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}
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define <4 x i1> @vec_of_bools(<4 x i1> %a, <4 x i1> %b, <4 x i1> %c) {
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; CHECK-LABEL: @vec_of_bools(
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; CHECK-NEXT: [[TMP1:%.*]] = select <4 x i1> %c, <4 x i1> %b, <4 x i1> %a
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; CHECK-NEXT: ret <4 x i1> [[TMP1]]
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;
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%not = xor <4 x i1> %c, <i1 true, i1 true, i1 true, i1 true>
|
|
%and1 = and <4 x i1> %not, %a
|
|
%and2 = and <4 x i1> %b, %c
|
|
%or = or <4 x i1> %and2, %and1
|
|
ret <4 x i1> %or
|
|
}
|
|
|
|
define i4 @vec_of_casted_bools(i4 %a, i4 %b, <4 x i1> %c) {
|
|
; CHECK-LABEL: @vec_of_casted_bools(
|
|
; CHECK-NEXT: [[TMP1:%.*]] = bitcast i4 %a to <4 x i1>
|
|
; CHECK-NEXT: [[TMP2:%.*]] = bitcast i4 %b to <4 x i1>
|
|
; CHECK-NEXT: [[TMP3:%.*]] = select <4 x i1> %c, <4 x i1> [[TMP2]], <4 x i1> [[TMP1]]
|
|
; CHECK-NEXT: [[TMP4:%.*]] = bitcast <4 x i1> [[TMP3]] to i4
|
|
; CHECK-NEXT: ret i4 [[TMP4]]
|
|
;
|
|
%not = xor <4 x i1> %c, <i1 true, i1 true, i1 true, i1 true>
|
|
%bc1 = bitcast <4 x i1> %not to i4
|
|
%bc2 = bitcast <4 x i1> %c to i4
|
|
%and1 = and i4 %a, %bc1
|
|
%and2 = and i4 %bc2, %b
|
|
%or = or i4 %and1, %and2
|
|
ret i4 %or
|
|
}
|
|
|
|
; FIXME: Missed conversions to select below here.
|
|
; Inverted 'and' constants mean this is a select.
|
|
|
|
define <4 x i32> @vec_sel_consts(<4 x i32> %a, <4 x i32> %b) {
|
|
; CHECK-LABEL: @vec_sel_consts(
|
|
; CHECK-NEXT: [[AND1:%.*]] = and <4 x i32> %a, <i32 -1, i32 0, i32 0, i32 -1>
|
|
; CHECK-NEXT: [[AND2:%.*]] = and <4 x i32> %b, <i32 0, i32 -1, i32 -1, i32 0>
|
|
; CHECK-NEXT: [[OR:%.*]] = or <4 x i32> [[AND1]], [[AND2]]
|
|
; CHECK-NEXT: ret <4 x i32> [[OR]]
|
|
;
|
|
%and1 = and <4 x i32> %a, <i32 -1, i32 0, i32 0, i32 -1>
|
|
%and2 = and <4 x i32> %b, <i32 0, i32 -1, i32 -1, i32 0>
|
|
%or = or <4 x i32> %and1, %and2
|
|
ret <4 x i32> %or
|
|
}
|
|
|
|
; The select condition constant is always derived from the first operand of the 'or'.
|
|
|
|
define <3 x i129> @vec_sel_consts_weird(<3 x i129> %a, <3 x i129> %b) {
|
|
; CHECK-LABEL: @vec_sel_consts_weird(
|
|
; CHECK-NEXT: [[AND1:%.*]] = and <3 x i129> %a, <i129 -1, i129 0, i129 -1>
|
|
; CHECK-NEXT: [[AND2:%.*]] = and <3 x i129> %b, <i129 0, i129 -1, i129 0>
|
|
; CHECK-NEXT: [[OR:%.*]] = or <3 x i129> [[AND2]], [[AND1]]
|
|
; CHECK-NEXT: ret <3 x i129> [[OR]]
|
|
;
|
|
%and1 = and <3 x i129> %a, <i129 -1, i129 0, i129 -1>
|
|
%and2 = and <3 x i129> %b, <i129 0, i129 -1, i129 0>
|
|
%or = or <3 x i129> %and2, %and1
|
|
ret <3 x i129> %or
|
|
}
|
|
|
|
; The mask elements must be inverted for this to be a select.
|
|
|
|
define <4 x i32> @vec_not_sel_consts(<4 x i32> %a, <4 x i32> %b) {
|
|
; CHECK-LABEL: @vec_not_sel_consts(
|
|
; CHECK-NEXT: [[AND1:%.*]] = and <4 x i32> %a, <i32 -1, i32 0, i32 0, i32 0>
|
|
; CHECK-NEXT: [[AND2:%.*]] = and <4 x i32> %b, <i32 0, i32 -1, i32 0, i32 -1>
|
|
; CHECK-NEXT: [[OR:%.*]] = or <4 x i32> [[AND1]], [[AND2]]
|
|
; CHECK-NEXT: ret <4 x i32> [[OR]]
|
|
;
|
|
%and1 = and <4 x i32> %a, <i32 -1, i32 0, i32 0, i32 0>
|
|
%and2 = and <4 x i32> %b, <i32 0, i32 -1, i32 0, i32 -1>
|
|
%or = or <4 x i32> %and1, %and2
|
|
ret <4 x i32> %or
|
|
}
|
|
|
|
; The inverted constants may be operands of xor instructions.
|
|
|
|
define <4 x i32> @vec_sel_xor(<4 x i32> %a, <4 x i32> %b, <4 x i1> %c) {
|
|
; CHECK-LABEL: @vec_sel_xor(
|
|
; CHECK-NEXT: [[MASK:%.*]] = sext <4 x i1> %c to <4 x i32>
|
|
; CHECK-NEXT: [[MASK_FLIP1:%.*]] = xor <4 x i32> [[MASK]], <i32 -1, i32 0, i32 0, i32 0>
|
|
; CHECK-NEXT: [[NOT_MASK_FLIP1:%.*]] = xor <4 x i32> [[MASK]], <i32 0, i32 -1, i32 -1, i32 -1>
|
|
; CHECK-NEXT: [[AND1:%.*]] = and <4 x i32> [[NOT_MASK_FLIP1]], %a
|
|
; CHECK-NEXT: [[AND2:%.*]] = and <4 x i32> [[MASK_FLIP1]], %b
|
|
; CHECK-NEXT: [[OR:%.*]] = or <4 x i32> [[AND1]], [[AND2]]
|
|
; CHECK-NEXT: ret <4 x i32> [[OR]]
|
|
;
|
|
%mask = sext <4 x i1> %c to <4 x i32>
|
|
%mask_flip1 = xor <4 x i32> %mask, <i32 -1, i32 0, i32 0, i32 0>
|
|
%not_mask_flip1 = xor <4 x i32> %mask, <i32 0, i32 -1, i32 -1, i32 -1>
|
|
%and1 = and <4 x i32> %not_mask_flip1, %a
|
|
%and2 = and <4 x i32> %mask_flip1, %b
|
|
%or = or <4 x i32> %and1, %and2
|
|
ret <4 x i32> %or
|
|
}
|
|
|