forked from OSchip/llvm-project
82 lines
2.6 KiB
C++
82 lines
2.6 KiB
C++
//===----- SchedulePostRAList.cpp - list scheduler ------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This implements a top-down list scheduler, using standard algorithms.
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// The basic approach uses a priority queue of available nodes to schedule.
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// One at a time, nodes are taken from the priority queue (thus in priority
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// order), checked for legality to schedule, and emitted if legal.
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//
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// Nodes may not be legal to schedule either due to structural hazards (e.g.
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// pipeline or resource constraints) or because an input to the instruction has
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// not completed execution.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "post-RA-sched"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/Support/Debug.h"
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//#include "llvm/ADT/Statistic.h"
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//#include <climits>
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//#include <queue>
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#include "llvm/Support/CommandLine.h"
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using namespace llvm;
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namespace {
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bool NoPostRAScheduling;
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// When this works it will be on by default.
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cl::opt<bool, true>
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DisablePostRAScheduler("disable-post-RA-scheduler",
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cl::desc("Disable scheduling after register allocation"),
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cl::location(NoPostRAScheduling),
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cl::init(true));
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class VISIBILITY_HIDDEN SchedulePostRATDList : public MachineFunctionPass {
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public:
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static char ID;
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SchedulePostRATDList() : MachineFunctionPass((intptr_t)&ID) {}
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private:
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MachineFunction *MF;
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const TargetMachine *TM;
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public:
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const char *getPassName() const {
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return "Post RA top-down list latency scheduler (STUB)";
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}
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bool runOnMachineFunction(MachineFunction &Fn);
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};
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char SchedulePostRATDList::ID = 0;
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}
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bool SchedulePostRATDList::runOnMachineFunction(MachineFunction &Fn) {
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if (NoPostRAScheduling)
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return true;
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DOUT << "SchedulePostRATDList\n";
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MF = &Fn;
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TM = &MF->getTarget();
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// Loop over all of the basic blocks
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for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
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MBB != MBBe; ++MBB)
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;
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return true;
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}
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//===----------------------------------------------------------------------===//
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// Public Constructor Functions
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//===----------------------------------------------------------------------===//
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FunctionPass *llvm::createPostRAScheduler() {
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return new SchedulePostRATDList();
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}
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