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Ashutosh Nema bfcac0b480 AMD family 17h (znver1) scheduler model update.
Summary:
This patch enables the following:
1) Regex based Instruction itineraries for integer instructions.
2) The instructions are grouped as per the nature of the instructions
   (move, arithmetic, logic, Misc, Control Transfer). 
3) FP instructions and their itineraries are added which includes values
   for SSE4A, BMI, BMI2 and SHA instructions.

Patch by Ganesh Gopalasubramanian

Reviewers: RKSimon, craig.topper

Subscribers: vprasad, shivaram, ddibyend, andreadb, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D36617

llvm-svn: 312237
2017-08-31 12:38:35 +00:00
clang docs: don't say that data flow tracing interface is unstable 2017-08-31 11:02:44 +00:00
clang-tools-extra [cppcoreguidelines] Don't rely on SmallPtrSet iteration order. 2017-08-30 20:18:40 +00:00
compiler-rt [cmake] Fix the list of arm32 architectures 2017-08-31 10:01:36 +00:00
debuginfo-tests Add a test for PR33166. 2017-05-25 19:33:16 +00:00
libclc amdgcn: rewrite barrier() using fence and clang __builtin_amdgcn_s_barrier 2017-08-16 17:09:00 +00:00
libcxx Fix test for C++03 2017-08-29 01:10:51 +00:00
libcxxabi Revert "[libcxxabi] When built with ASan, __cxa_throw calls __asan_handle_no_return" 2017-08-16 22:05:54 +00:00
libunwind ARM: explicitly specify the 8-byte alignment 2017-08-23 16:50:27 +00:00
lld [ELF] - Removed unused dummy methods. NFC. 2017-08-31 11:05:38 +00:00
lldb Now a ppc64le binary is correctly detected: 2017-08-30 18:36:48 +00:00
llgo irgen: Create functions instead of global variables for builtin hash and equal algorithms. 2017-06-04 22:11:28 +00:00
llvm AMD family 17h (znver1) scheduler model update. 2017-08-31 12:38:35 +00:00
openmp Use va_copy instead of __va_copy to fix building libomp against musl libc 2017-08-19 23:53:36 +00:00
parallel-libs [Axccel] Remove -Wno-missing-braces in build 2016-12-19 21:34:07 +00:00
polly [BlockGenerator] Generate entry block of regions from instruction lists 2017-08-31 03:17:35 +00:00