forked from OSchip/llvm-project
93 lines
3.3 KiB
ArmAsm
93 lines
3.3 KiB
ArmAsm
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
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// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
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// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
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// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
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// RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
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bic z5.b, z5.b, #0xf9
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// CHECK-INST: and z5.b, z5.b, #0x6
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// CHECK-ENCODING: [0x25,0x3e,0x80,0x05]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 25 3e 80 05 <unknown>
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bic z23.h, z23.h, #0xfff9
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// CHECK-INST: and z23.h, z23.h, #0x6
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// CHECK-ENCODING: [0x37,0x7c,0x80,0x05]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 37 7c 80 05 <unknown>
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bic z0.s, z0.s, #0xfffffff9
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// CHECK-INST: and z0.s, z0.s, #0x6
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// CHECK-ENCODING: [0x20,0xf8,0x80,0x05]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 20 f8 80 05 <unknown>
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bic z0.d, z0.d, #0xfffffffffffffff9
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// CHECK-INST: and z0.d, z0.d, #0x6
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// CHECK-ENCODING: [0x20,0xf8,0x83,0x05]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 20 f8 83 05 <unknown>
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bic z5.b, z5.b, #0x6
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// CHECK-INST: and z5.b, z5.b, #0xf9
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// CHECK-ENCODING: [0xa5,0x2e,0x80,0x05]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: a5 2e 80 05 <unknown>
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bic z23.h, z23.h, #0x6
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// CHECK-INST: and z23.h, z23.h, #0xfff9
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// CHECK-ENCODING: [0xb7,0x6d,0x80,0x05]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: b7 6d 80 05 <unknown>
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bic z0.s, z0.s, #0x6
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// CHECK-INST: and z0.s, z0.s, #0xfffffff9
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// CHECK-ENCODING: [0xa0,0xeb,0x80,0x05]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: a0 eb 80 05 <unknown>
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bic z0.d, z0.d, #0x6
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// CHECK-INST: and z0.d, z0.d, #0xfffffffffffffff9
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// CHECK-ENCODING: [0xa0,0xef,0x83,0x05]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: a0 ef 83 05 <unknown>
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bic z0.d, z0.d, z0.d
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// CHECK-INST: bic z0.d, z0.d, z0.d
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// CHECK-ENCODING: [0x00,0x30,0xe0,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: 00 30 e0 04 <unknown>
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bic z23.d, z13.d, z8.d
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// CHECK-INST: bic z23.d, z13.d, z8.d
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// CHECK-ENCODING: [0xb7,0x31,0xe8,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: b7 31 e8 04 <unknown>
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bic z31.b, p7/m, z31.b, z31.b
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// CHECK-INST: bic z31.b, p7/m, z31.b, z31.b
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// CHECK-ENCODING: [0xff,0x1f,0x1b,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff 1f 1b 04 <unknown>
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bic z31.h, p7/m, z31.h, z31.h
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// CHECK-INST: bic z31.h, p7/m, z31.h, z31.h
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// CHECK-ENCODING: [0xff,0x1f,0x5b,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff 1f 5b 04 <unknown>
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bic z31.s, p7/m, z31.s, z31.s
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// CHECK-INST: bic z31.s, p7/m, z31.s, z31.s
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// CHECK-ENCODING: [0xff,0x1f,0x9b,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff 1f 9b 04 <unknown>
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bic z31.d, p7/m, z31.d, z31.d
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// CHECK-INST: bic z31.d, p7/m, z31.d, z31.d
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// CHECK-ENCODING: [0xff,0x1f,0xdb,0x04]
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// CHECK-ERROR: instruction requires: sve
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// CHECK-UNKNOWN: ff 1f db 04 <unknown>
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