forked from OSchip/llvm-project
80 lines
3.3 KiB
LLVM
80 lines
3.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,X86,SSE,X86-SSE,SSE2,X86-SSE2
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,X86,SSE,X86-SSE,SSE41,X86-SSE41
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,X86,AVX,X86-AVX,AVX1,X86-AVX1
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,X86,AVX,X86-AVX,AVX512,X86-AVX512
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,X64,SSE,X64-SSE,SSE2,X64-SSE2
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,X64,SSE,X64-SSE,SSE41,X64-SSE41
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,X64,AVX,X64-AVX,AVX1,X64-AVX1
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,X64,AVX,X64-AVX,AVX512,X64-AVX512
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; PR21507 - https://llvm.org/bugs/show_bug.cgi?id=21507
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; Each function should be a single math op; no extra moves.
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define <4 x float> @recip(<4 x float> %x) {
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; SSE-LABEL: recip:
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; SSE: # %bb.0:
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; SSE-NEXT: rcpss %xmm0, %xmm0
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; SSE-NEXT: ret{{[l|q]}}
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;
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; AVX-LABEL: recip:
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; AVX: # %bb.0:
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; AVX-NEXT: vrcpss %xmm0, %xmm0, %xmm0
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; AVX-NEXT: ret{{[l|q]}}
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%y = tail call <4 x float> @llvm.x86.sse.rcp.ss(<4 x float> %x)
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%shuf = shufflevector <4 x float> %y, <4 x float> %x, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
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ret <4 x float> %shuf
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}
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define <4 x float> @recip_square_root(<4 x float> %x) {
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; SSE-LABEL: recip_square_root:
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; SSE: # %bb.0:
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; SSE-NEXT: rsqrtss %xmm0, %xmm0
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; SSE-NEXT: ret{{[l|q]}}
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;
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; AVX-LABEL: recip_square_root:
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; AVX: # %bb.0:
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; AVX-NEXT: vrsqrtss %xmm0, %xmm0, %xmm0
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; AVX-NEXT: ret{{[l|q]}}
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%y = tail call <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float> %x)
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%shuf = shufflevector <4 x float> %y, <4 x float> %x, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
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ret <4 x float> %shuf
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}
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define <4 x float> @square_root(<4 x float> %x) {
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; SSE-LABEL: square_root:
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; SSE: # %bb.0:
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; SSE-NEXT: sqrtss %xmm0, %xmm0
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; SSE-NEXT: ret{{[l|q]}}
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;
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; AVX-LABEL: square_root:
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; AVX: # %bb.0:
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; AVX-NEXT: vsqrtss %xmm0, %xmm0, %xmm0
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; AVX-NEXT: ret{{[l|q]}}
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%y = tail call <4 x float> @llvm.x86.sse.sqrt.ss(<4 x float> %x)
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%shuf = shufflevector <4 x float> %y, <4 x float> %x, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
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ret <4 x float> %shuf
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}
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define <2 x double> @square_root_double(<2 x double> %x) {
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; SSE-LABEL: square_root_double:
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; SSE: # %bb.0:
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; SSE-NEXT: sqrtsd %xmm0, %xmm0
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; SSE-NEXT: ret{{[l|q]}}
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;
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; AVX-LABEL: square_root_double:
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; AVX: # %bb.0:
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; AVX-NEXT: vsqrtsd %xmm0, %xmm0, %xmm0
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; AVX-NEXT: ret{{[l|q]}}
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%y = tail call <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double> %x)
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%shuf = shufflevector <2 x double> %y, <2 x double> %x, <2 x i32> <i32 0, i32 3>
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ret <2 x double> %shuf
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}
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declare <4 x float> @llvm.x86.sse.rcp.ss(<4 x float>)
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declare <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float>)
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declare <4 x float> @llvm.x86.sse.sqrt.ss(<4 x float>)
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declare <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double>)
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