forked from OSchip/llvm-project
144 lines
6.8 KiB
LLVM
144 lines
6.8 KiB
LLVM
; RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 < %s | FileCheck %s
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;
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; Check that the second load of @g_2 is not incorrectly eliminated by
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; DAGCombiner. It is needed since the preceding store is aliasing.
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; %.b1.i = load i1, i1* @g_2, align 4
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; ...
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; %g_717.sink.i = select i1 %cmp.i, i1* @g_717, i1* @g_2
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; store i1 true, i1* %g_717.sink.i, align 4
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; %.b = load i1, i1* @g_2, align 4
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; CHECK: # %bb.6: # %crc32_gentab.exit
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; CHECK: larl %r2, g_2
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; CHECK-NEXT: llc %r3, 0(%r2)
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; CHECK-NOT: %r2
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; CHECK: llc %r1, 0(%r2)
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@g_2 = external hidden unnamed_addr global i1, align 4
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@.str.1 = external hidden unnamed_addr constant [4 x i8], align 2
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@g_717 = external hidden unnamed_addr global i1, align 4
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@.str.2 = external hidden unnamed_addr constant [6 x i8], align 2
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@crc32_context = external hidden unnamed_addr global i32, align 4
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@crc32_tab = external hidden unnamed_addr global [256 x i32], align 4
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@g_5 = external hidden unnamed_addr global i32, align 4
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@.str.4 = external hidden unnamed_addr constant [15 x i8], align 2
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; Function Attrs: nounwind
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define signext i32 @main(i32 signext %argc, i8** nocapture readonly %argv) local_unnamed_addr #0 {
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entry:
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%cmp = icmp eq i32 %argc, 2
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br i1 %cmp, label %cond.true, label %vector.ph
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cond.true: ; preds = %entry
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%arrayidx = getelementptr inbounds i8*, i8** %argv, i64 1
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%0 = load i8*, i8** %arrayidx, align 8, !tbaa !2
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%1 = load i8, i8* %0, align 1, !tbaa !6
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%conv4 = zext i8 %1 to i32
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%sub = sub nsw i32 49, %conv4
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%cmp8 = icmp eq i32 %sub, 0
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br i1 %cmp8, label %if.then, label %if.end35
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if.then: ; preds = %cond.true
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%arrayidx11 = getelementptr inbounds i8, i8* %0, i64 1
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%2 = load i8, i8* %arrayidx11, align 1, !tbaa !6
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%conv12 = zext i8 %2 to i32
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%sub13 = sub nsw i32 0, %conv12
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br label %if.end35
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if.end35: ; preds = %if.then, %cond.true
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%__result.0 = phi i32 [ %sub13, %if.then ], [ %sub, %cond.true ]
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%phitmp = icmp eq i32 %__result.0, 0
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%spec.select = zext i1 %phitmp to i32
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br label %vector.ph
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vector.ph: ; preds = %if.end35, %entry
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%print_hash_value.0 = phi i32 [ 0, %entry ], [ %spec.select, %if.end35 ]
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br label %vector.body
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vector.body: ; preds = %vector.body, %vector.ph
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%index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
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%vec.ind22 = phi <4 x i32> [ <i32 0, i32 1, i32 2, i32 3>, %vector.ph ], [ %vec.ind.next23, %vector.body ]
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%3 = and <4 x i32> %vec.ind22, <i32 1, i32 1, i32 1, i32 1>
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%4 = icmp eq <4 x i32> %3, zeroinitializer
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%5 = lshr <4 x i32> %vec.ind22, <i32 1, i32 1, i32 1, i32 1>
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%6 = xor <4 x i32> %5, <i32 -306674912, i32 -306674912, i32 -306674912, i32 -306674912>
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%7 = select <4 x i1> %4, <4 x i32> %5, <4 x i32> %6
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%8 = and <4 x i32> %7, <i32 1, i32 1, i32 1, i32 1>
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%9 = icmp eq <4 x i32> %8, zeroinitializer
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%10 = lshr <4 x i32> %7, <i32 1, i32 1, i32 1, i32 1>
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%11 = xor <4 x i32> %10, <i32 -306674912, i32 -306674912, i32 -306674912, i32 -306674912>
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%12 = select <4 x i1> %9, <4 x i32> %10, <4 x i32> %11
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%13 = and <4 x i32> %12, <i32 1, i32 1, i32 1, i32 1>
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%14 = icmp eq <4 x i32> %13, zeroinitializer
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%15 = lshr <4 x i32> %12, <i32 1, i32 1, i32 1, i32 1>
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%16 = xor <4 x i32> %15, <i32 -306674912, i32 -306674912, i32 -306674912, i32 -306674912>
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%17 = select <4 x i1> %14, <4 x i32> %15, <4 x i32> %16
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%18 = and <4 x i32> %17, <i32 1, i32 1, i32 1, i32 1>
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%19 = icmp eq <4 x i32> %18, zeroinitializer
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%20 = lshr <4 x i32> %17, <i32 1, i32 1, i32 1, i32 1>
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%21 = xor <4 x i32> %20, <i32 -306674912, i32 -306674912, i32 -306674912, i32 -306674912>
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%22 = select <4 x i1> %19, <4 x i32> %20, <4 x i32> %21
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%23 = and <4 x i32> %22, <i32 1, i32 1, i32 1, i32 1>
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%24 = icmp eq <4 x i32> %23, zeroinitializer
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%25 = lshr <4 x i32> %22, <i32 1, i32 1, i32 1, i32 1>
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%26 = xor <4 x i32> %25, <i32 -306674912, i32 -306674912, i32 -306674912, i32 -306674912>
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%27 = select <4 x i1> %24, <4 x i32> %25, <4 x i32> %26
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%28 = and <4 x i32> %27, <i32 1, i32 1, i32 1, i32 1>
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%29 = icmp eq <4 x i32> %28, zeroinitializer
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%30 = lshr <4 x i32> %27, <i32 1, i32 1, i32 1, i32 1>
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%31 = xor <4 x i32> %30, <i32 -306674912, i32 -306674912, i32 -306674912, i32 -306674912>
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%32 = select <4 x i1> %29, <4 x i32> %30, <4 x i32> %31
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%33 = and <4 x i32> %32, <i32 1, i32 1, i32 1, i32 1>
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%34 = icmp eq <4 x i32> %33, zeroinitializer
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%35 = lshr <4 x i32> %32, <i32 1, i32 1, i32 1, i32 1>
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%36 = xor <4 x i32> %35, <i32 -306674912, i32 -306674912, i32 -306674912, i32 -306674912>
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%37 = select <4 x i1> %34, <4 x i32> %35, <4 x i32> %36
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%38 = and <4 x i32> %37, <i32 1, i32 1, i32 1, i32 1>
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%39 = icmp eq <4 x i32> %38, zeroinitializer
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%40 = lshr <4 x i32> %37, <i32 1, i32 1, i32 1, i32 1>
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%41 = xor <4 x i32> %40, <i32 -306674912, i32 -306674912, i32 -306674912, i32 -306674912>
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%42 = select <4 x i1> %39, <4 x i32> %40, <4 x i32> %41
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%43 = getelementptr inbounds [256 x i32], [256 x i32]* @crc32_tab, i64 0, i64 %index
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%44 = bitcast i32* %43 to <4 x i32>*
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store <4 x i32> %42, <4 x i32>* %44, align 4, !tbaa !7
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%index.next = add i64 %index, 4
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%vec.ind.next23 = add <4 x i32> %vec.ind22, <i32 4, i32 4, i32 4, i32 4>
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%45 = icmp eq i64 %index.next, 256
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br i1 %45, label %crc32_gentab.exit, label %vector.body
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crc32_gentab.exit: ; preds = %vector.body
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%46 = load i32, i32* @g_5, align 4, !tbaa !7
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%.b1.i = load i1, i1* @g_2, align 4
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%47 = select i1 %.b1.i, i32 1, i32 2
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%and.i21 = and i32 %47, %46
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store i32 %and.i21, i32* @g_5, align 4, !tbaa !7
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%cmp.i = icmp eq i32 %and.i21, 1
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%g_717.sink.i = select i1 %cmp.i, i1* @g_717, i1* @g_2
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store i1 true, i1* %g_717.sink.i, align 4
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%.b = load i1, i1* @g_2, align 4
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%conv44 = select i1 %.b, i64 1, i64 2
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tail call fastcc void @transparent_crc(i64 %conv44, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0), i32 signext %print_hash_value.0)
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%.b20 = load i1, i1* @g_717, align 4
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%conv45 = select i1 %.b20, i64 2, i64 0
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tail call fastcc void @transparent_crc(i64 %conv45, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str.2, i64 0, i64 0), i32 signext %print_hash_value.0)
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%48 = load i32, i32* @crc32_context, align 4, !tbaa !7
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%49 = xor i32 %48, -1
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%call.i = tail call signext i32 (i8*, ...) @printf(i8* getelementptr inbounds ([15 x i8], [15 x i8]* @.str.4, i64 0, i64 0), i32 zeroext %49) #2
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ret i32 0
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}
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; Function Attrs: nounwind
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declare hidden fastcc void @transparent_crc(i64, i8*, i32 signext) unnamed_addr #0
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; Function Attrs: nounwind
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declare signext i32 @printf(i8* nocapture readonly, ...) local_unnamed_addr #1
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!2 = !{!3, !3, i64 0}
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!3 = !{!"any pointer", !4, i64 0}
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!4 = !{!"omnipotent char", !5, i64 0}
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!5 = !{!"Simple C/C++ TBAA"}
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!6 = !{!4, !4, i64 0}
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!7 = !{!8, !8, i64 0}
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!8 = !{!"int", !4, i64 0}
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