forked from OSchip/llvm-project
152 lines
3.4 KiB
LLVM
152 lines
3.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=powerpc64le-- | FileCheck %s
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; If positive...
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define i32 @zext_ifpos(i32 %x) {
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; CHECK-LABEL: zext_ifpos:
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; CHECK: # %bb.0:
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; CHECK-NEXT: nor 3, 3, 3
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; CHECK-NEXT: srwi 3, 3, 31
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; CHECK-NEXT: blr
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%c = icmp sgt i32 %x, -1
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%e = zext i1 %c to i32
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ret i32 %e
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}
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define i32 @add_zext_ifpos(i32 %x) {
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; CHECK-LABEL: add_zext_ifpos:
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; CHECK: # %bb.0:
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; CHECK-NEXT: srwi 3, 3, 31
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; CHECK-NEXT: xori 3, 3, 1
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; CHECK-NEXT: addi 3, 3, 41
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; CHECK-NEXT: blr
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%c = icmp sgt i32 %x, -1
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%e = zext i1 %c to i32
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%r = add i32 %e, 41
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ret i32 %r
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}
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define i32 @sel_ifpos_tval_bigger(i32 %x) {
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; CHECK-LABEL: sel_ifpos_tval_bigger:
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; CHECK: # %bb.0:
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; CHECK-NEXT: li 4, 41
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; CHECK-NEXT: cmpwi 0, 3, -1
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; CHECK-NEXT: li 3, 42
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; CHECK-NEXT: isel 3, 3, 4, 1
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; CHECK-NEXT: blr
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%c = icmp sgt i32 %x, -1
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%r = select i1 %c, i32 42, i32 41
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ret i32 %r
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}
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define i32 @sext_ifpos(i32 %x) {
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; CHECK-LABEL: sext_ifpos:
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; CHECK: # %bb.0:
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; CHECK-NEXT: nor 3, 3, 3
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; CHECK-NEXT: srawi 3, 3, 31
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; CHECK-NEXT: blr
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%c = icmp sgt i32 %x, -1
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%e = sext i1 %c to i32
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ret i32 %e
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}
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define i32 @add_sext_ifpos(i32 %x) {
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; CHECK-LABEL: add_sext_ifpos:
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; CHECK: # %bb.0:
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; CHECK-NEXT: srawi 3, 3, 31
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; CHECK-NEXT: nor 3, 3, 3
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; CHECK-NEXT: addi 3, 3, 42
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; CHECK-NEXT: blr
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%c = icmp sgt i32 %x, -1
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%e = sext i1 %c to i32
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%r = add i32 %e, 42
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ret i32 %r
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}
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define i32 @sel_ifpos_fval_bigger(i32 %x) {
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; CHECK-LABEL: sel_ifpos_fval_bigger:
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; CHECK: # %bb.0:
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; CHECK-NEXT: li 4, 42
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; CHECK-NEXT: cmpwi 0, 3, -1
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; CHECK-NEXT: li 3, 41
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; CHECK-NEXT: isel 3, 3, 4, 1
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; CHECK-NEXT: blr
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%c = icmp sgt i32 %x, -1
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%r = select i1 %c, i32 41, i32 42
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ret i32 %r
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}
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; If negative...
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define i32 @zext_ifneg(i32 %x) {
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; CHECK-LABEL: zext_ifneg:
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; CHECK: # %bb.0:
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; CHECK-NEXT: srwi 3, 3, 31
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; CHECK-NEXT: blr
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%c = icmp slt i32 %x, 0
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%r = zext i1 %c to i32
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ret i32 %r
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}
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define i32 @add_zext_ifneg(i32 %x) {
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; CHECK-LABEL: add_zext_ifneg:
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; CHECK: # %bb.0:
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; CHECK-NEXT: srwi 3, 3, 31
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; CHECK-NEXT: addi 3, 3, 41
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; CHECK-NEXT: blr
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%c = icmp slt i32 %x, 0
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%e = zext i1 %c to i32
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%r = add i32 %e, 41
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ret i32 %r
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}
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define i32 @sel_ifneg_tval_bigger(i32 %x) {
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; CHECK-LABEL: sel_ifneg_tval_bigger:
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; CHECK: # %bb.0:
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; CHECK-NEXT: li 4, 41
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; CHECK-NEXT: cmpwi 0, 3, 0
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; CHECK-NEXT: li 3, 42
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; CHECK-NEXT: isel 3, 3, 4, 0
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; CHECK-NEXT: blr
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%c = icmp slt i32 %x, 0
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%r = select i1 %c, i32 42, i32 41
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ret i32 %r
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}
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define i32 @sext_ifneg(i32 %x) {
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; CHECK-LABEL: sext_ifneg:
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; CHECK: # %bb.0:
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; CHECK-NEXT: srawi 3, 3, 31
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; CHECK-NEXT: blr
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%c = icmp slt i32 %x, 0
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%r = sext i1 %c to i32
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ret i32 %r
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}
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define i32 @add_sext_ifneg(i32 %x) {
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; CHECK-LABEL: add_sext_ifneg:
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; CHECK: # %bb.0:
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; CHECK-NEXT: srawi 3, 3, 31
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; CHECK-NEXT: addi 3, 3, 42
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; CHECK-NEXT: blr
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%c = icmp slt i32 %x, 0
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%e = sext i1 %c to i32
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%r = add i32 %e, 42
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ret i32 %r
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}
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define i32 @sel_ifneg_fval_bigger(i32 %x) {
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; CHECK-LABEL: sel_ifneg_fval_bigger:
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; CHECK: # %bb.0:
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; CHECK-NEXT: li 4, 42
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; CHECK-NEXT: cmpwi 0, 3, 0
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; CHECK-NEXT: li 3, 41
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; CHECK-NEXT: isel 3, 3, 4, 0
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; CHECK-NEXT: blr
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%c = icmp slt i32 %x, 0
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%r = select i1 %c, i32 41, i32 42
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ret i32 %r
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}
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