forked from OSchip/llvm-project
495 lines
17 KiB
LLVM
495 lines
17 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; REQUIRES: asserts
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; RUN: llc < %s -mtriple=powerpc64le -debug-only=isel -o /dev/null 2>&1 | FileCheck %s --check-prefix=FMFDEBUG
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; RUN: llc < %s -mtriple=powerpc64le | FileCheck %s --check-prefix=FMF
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; RUN: llc < %s -mtriple=powerpc64le -debug-only=isel -o /dev/null 2>&1 -enable-unsafe-fp-math -enable-no-nans-fp-math | FileCheck %s --check-prefix=GLOBALDEBUG
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; RUN: llc < %s -mtriple=powerpc64le -enable-unsafe-fp-math -enable-no-nans-fp-math | FileCheck %s --check-prefix=GLOBAL
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; Test FP transforms using instruction/node-level fast-math-flags.
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; We're also checking debug output to verify that FMF is propagated to the newly created nodes.
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; The run with the global unsafe param tests the pre-FMF behavior using regular instructions/nodes.
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declare float @llvm.fma.f32(float, float, float)
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declare float @llvm.sqrt.f32(float)
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; X * Y + Z --> fma(X, Y, Z)
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; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fadd_contract1:'
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; FMFDEBUG: fma contract {{t[0-9]+}}, {{t[0-9]+}}, {{t[0-9]+}}
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; FMFDEBUG: Type-legalized selection DAG: %bb.0 'fmul_fadd_contract1:'
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define float @fmul_fadd_contract1(float %x, float %y, float %z) {
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; FMF-LABEL: fmul_fadd_contract1:
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; FMF: # %bb.0:
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; FMF-NEXT: xsmaddasp 3, 1, 2
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; FMF-NEXT: fmr 1, 3
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; FMF-NEXT: blr
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;
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; GLOBAL-LABEL: fmul_fadd_contract1:
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; GLOBAL: # %bb.0:
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; GLOBAL-NEXT: xsmaddasp 3, 1, 2
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; GLOBAL-NEXT: fmr 1, 3
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; GLOBAL-NEXT: blr
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%mul = fmul float %x, %y
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%add = fadd contract float %mul, %z
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ret float %add
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}
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; This shouldn't change anything - the intermediate fmul result is now also flagged.
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; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fadd_contract2:'
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; FMFDEBUG: fma contract {{t[0-9]+}}, {{t[0-9]+}}, {{t[0-9]+}}
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; FMFDEBUG: Type-legalized selection DAG: %bb.0 'fmul_fadd_contract2:'
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define float @fmul_fadd_contract2(float %x, float %y, float %z) {
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; FMF-LABEL: fmul_fadd_contract2:
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; FMF: # %bb.0:
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; FMF-NEXT: xsmaddasp 3, 1, 2
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; FMF-NEXT: fmr 1, 3
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; FMF-NEXT: blr
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;
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; GLOBAL-LABEL: fmul_fadd_contract2:
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; GLOBAL: # %bb.0:
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; GLOBAL-NEXT: xsmaddasp 3, 1, 2
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; GLOBAL-NEXT: fmr 1, 3
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; GLOBAL-NEXT: blr
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%mul = fmul contract float %x, %y
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%add = fadd contract float %mul, %z
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ret float %add
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}
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; Reassociation implies that FMA contraction is allowed.
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; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fadd_reassoc1:'
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; FMFDEBUG: fma reassoc {{t[0-9]+}}, {{t[0-9]+}}, {{t[0-9]+}}
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; FMFDEBUG: Type-legalized selection DAG: %bb.0 'fmul_fadd_reassoc1:'
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define float @fmul_fadd_reassoc1(float %x, float %y, float %z) {
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; FMF-LABEL: fmul_fadd_reassoc1:
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; FMF: # %bb.0:
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; FMF-NEXT: xsmaddasp 3, 1, 2
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; FMF-NEXT: fmr 1, 3
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; FMF-NEXT: blr
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;
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; GLOBAL-LABEL: fmul_fadd_reassoc1:
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; GLOBAL: # %bb.0:
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; GLOBAL-NEXT: xsmaddasp 3, 1, 2
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; GLOBAL-NEXT: fmr 1, 3
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; GLOBAL-NEXT: blr
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%mul = fmul float %x, %y
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%add = fadd reassoc float %mul, %z
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ret float %add
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}
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; This shouldn't change anything - the intermediate fmul result is now also flagged.
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; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fadd_reassoc2:'
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; FMFDEBUG: fma reassoc {{t[0-9]+}}, {{t[0-9]+}}
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; FMFDEBUG: Type-legalized selection DAG: %bb.0 'fmul_fadd_reassoc2:'
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define float @fmul_fadd_reassoc2(float %x, float %y, float %z) {
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; FMF-LABEL: fmul_fadd_reassoc2:
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; FMF: # %bb.0:
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; FMF-NEXT: xsmaddasp 3, 1, 2
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; FMF-NEXT: fmr 1, 3
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; FMF-NEXT: blr
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;
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; GLOBAL-LABEL: fmul_fadd_reassoc2:
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; GLOBAL: # %bb.0:
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; GLOBAL-NEXT: xsmaddasp 3, 1, 2
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; GLOBAL-NEXT: fmr 1, 3
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; GLOBAL-NEXT: blr
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%mul = fmul reassoc float %x, %y
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%add = fadd reassoc float %mul, %z
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ret float %add
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}
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; The fadd is now fully 'fast'. This implies that contraction is allowed.
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; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fadd_fast1:'
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; FMFDEBUG: fma nnan ninf nsz arcp contract afn reassoc {{t[0-9]+}}, {{t[0-9]+}}, {{t[0-9]+}}
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; FMFDEBUG: Type-legalized selection DAG: %bb.0 'fmul_fadd_fast1:'
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define float @fmul_fadd_fast1(float %x, float %y, float %z) {
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; FMF-LABEL: fmul_fadd_fast1:
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; FMF: # %bb.0:
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; FMF-NEXT: xsmaddasp 3, 1, 2
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; FMF-NEXT: fmr 1, 3
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; FMF-NEXT: blr
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;
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; GLOBAL-LABEL: fmul_fadd_fast1:
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; GLOBAL: # %bb.0:
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; GLOBAL-NEXT: xsmaddasp 3, 1, 2
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; GLOBAL-NEXT: fmr 1, 3
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; GLOBAL-NEXT: blr
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%mul = fmul fast float %x, %y
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%add = fadd fast float %mul, %z
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ret float %add
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}
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; This shouldn't change anything - the intermediate fmul result is now also flagged.
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; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fadd_fast2:'
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; FMFDEBUG: fma nnan ninf nsz arcp contract afn reassoc {{t[0-9]+}}, {{t[0-9]+}}, {{t[0-9]+}}
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; FMFDEBUG: Type-legalized selection DAG: %bb.0 'fmul_fadd_fast2:'
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define float @fmul_fadd_fast2(float %x, float %y, float %z) {
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; FMF-LABEL: fmul_fadd_fast2:
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; FMF: # %bb.0:
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; FMF-NEXT: xsmaddasp 3, 1, 2
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; FMF-NEXT: fmr 1, 3
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; FMF-NEXT: blr
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;
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; GLOBAL-LABEL: fmul_fadd_fast2:
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; GLOBAL: # %bb.0:
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; GLOBAL-NEXT: xsmaddasp 3, 1, 2
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; GLOBAL-NEXT: fmr 1, 3
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; GLOBAL-NEXT: blr
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%mul = fmul fast float %x, %y
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%add = fadd fast float %mul, %z
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ret float %add
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}
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; fma(X, 7.0, X * 42.0) --> X * 49.0
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; This is the minimum FMF needed for this transform - the FMA allows reassociation.
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; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fma_reassoc1:'
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; FMFDEBUG: fmul reassoc {{t[0-9]+}},
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; FMFDEBUG: Type-legalized selection DAG: %bb.0 'fmul_fma_reassoc1:'
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; GLOBALDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fma_reassoc1:'
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; GLOBALDEBUG: fmul reassoc {{t[0-9]+}}
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; GLOBALDEBUG: Type-legalized selection DAG: %bb.0 'fmul_fma_reassoc1:'
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define float @fmul_fma_reassoc1(float %x) {
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; FMF-LABEL: fmul_fma_reassoc1:
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; FMF: # %bb.0:
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; FMF-NEXT: addis 3, 2, .LCPI6_0@toc@ha
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; FMF-NEXT: addi 3, 3, .LCPI6_0@toc@l
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; FMF-NEXT: lfsx 0, 0, 3
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; FMF-NEXT: xsmulsp 1, 1, 0
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; FMF-NEXT: blr
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;
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; GLOBAL-LABEL: fmul_fma_reassoc1:
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; GLOBAL: # %bb.0:
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; GLOBAL-NEXT: addis 3, 2, .LCPI6_0@toc@ha
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; GLOBAL-NEXT: addi 3, 3, .LCPI6_0@toc@l
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; GLOBAL-NEXT: lfsx 0, 0, 3
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; GLOBAL-NEXT: xsmulsp 1, 1, 0
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; GLOBAL-NEXT: blr
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%mul = fmul float %x, 42.0
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%fma = call reassoc float @llvm.fma.f32(float %x, float 7.0, float %mul)
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ret float %fma
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}
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; This shouldn't change anything - the intermediate fmul result is now also flagged.
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; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fma_reassoc2:'
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; FMFDEBUG: fmul reassoc {{t[0-9]+}}
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; FMFDEBUG: Type-legalized selection DAG: %bb.0 'fmul_fma_reassoc2:'
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; GLOBALDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fma_reassoc2:'
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; GLOBALDEBUG: fmul reassoc {{t[0-9]+}}
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; GLOBALDEBUG: Type-legalized selection DAG: %bb.0 'fmul_fma_reassoc2:'
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define float @fmul_fma_reassoc2(float %x) {
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; FMF-LABEL: fmul_fma_reassoc2:
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; FMF: # %bb.0:
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; FMF-NEXT: addis 3, 2, .LCPI7_0@toc@ha
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; FMF-NEXT: addi 3, 3, .LCPI7_0@toc@l
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; FMF-NEXT: lfsx 0, 0, 3
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; FMF-NEXT: xsmulsp 1, 1, 0
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; FMF-NEXT: blr
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;
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; GLOBAL-LABEL: fmul_fma_reassoc2:
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; GLOBAL: # %bb.0:
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; GLOBAL-NEXT: addis 3, 2, .LCPI7_0@toc@ha
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; GLOBAL-NEXT: addi 3, 3, .LCPI7_0@toc@l
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; GLOBAL-NEXT: lfsx 0, 0, 3
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; GLOBAL-NEXT: xsmulsp 1, 1, 0
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; GLOBAL-NEXT: blr
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%mul = fmul reassoc float %x, 42.0
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%fma = call reassoc float @llvm.fma.f32(float %x, float 7.0, float %mul)
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ret float %fma
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}
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; The FMA is now fully 'fast'. This implies that reassociation is allowed.
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; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fma_fast1:'
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; FMFDEBUG: fmul nnan ninf nsz arcp contract afn reassoc {{t[0-9]+}}
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; FMFDEBUG: Type-legalized selection DAG: %bb.0 'fmul_fma_fast1:'
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; GLOBALDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fma_fast1:'
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; GLOBALDEBUG: fmul nnan ninf nsz arcp contract afn reassoc {{t[0-9]+}}
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; GLOBALDEBUG: Type-legalized selection DAG: %bb.0 'fmul_fma_fast1:'
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define float @fmul_fma_fast1(float %x) {
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; FMF-LABEL: fmul_fma_fast1:
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; FMF: # %bb.0:
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; FMF-NEXT: addis 3, 2, .LCPI8_0@toc@ha
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; FMF-NEXT: addi 3, 3, .LCPI8_0@toc@l
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; FMF-NEXT: lfsx 0, 0, 3
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; FMF-NEXT: xsmulsp 1, 1, 0
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; FMF-NEXT: blr
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;
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; GLOBAL-LABEL: fmul_fma_fast1:
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; GLOBAL: # %bb.0:
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; GLOBAL-NEXT: addis 3, 2, .LCPI8_0@toc@ha
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; GLOBAL-NEXT: addi 3, 3, .LCPI8_0@toc@l
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; GLOBAL-NEXT: lfsx 0, 0, 3
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; GLOBAL-NEXT: xsmulsp 1, 1, 0
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; GLOBAL-NEXT: blr
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%mul = fmul float %x, 42.0
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%fma = call fast float @llvm.fma.f32(float %x, float 7.0, float %mul)
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ret float %fma
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}
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; This shouldn't change anything - the intermediate fmul result is now also flagged.
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; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fma_fast2:'
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; FMFDEBUG: fmul nnan ninf nsz arcp contract afn reassoc {{t[0-9]+}}
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; FMFDEBUG: Type-legalized selection DAG: %bb.0 'fmul_fma_fast2:'
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; GLOBALDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fmul_fma_fast2:'
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; GLOBALDEBUG: fmul nnan ninf nsz arcp contract afn reassoc {{t[0-9]+}}
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; GLOBALDEBUG: Type-legalized selection DAG: %bb.0 'fmul_fma_fast2:'
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define float @fmul_fma_fast2(float %x) {
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; FMF-LABEL: fmul_fma_fast2:
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; FMF: # %bb.0:
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; FMF-NEXT: addis 3, 2, .LCPI9_0@toc@ha
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; FMF-NEXT: addi 3, 3, .LCPI9_0@toc@l
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; FMF-NEXT: lfsx 0, 0, 3
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; FMF-NEXT: xsmulsp 1, 1, 0
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; FMF-NEXT: blr
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;
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; GLOBAL-LABEL: fmul_fma_fast2:
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; GLOBAL: # %bb.0:
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; GLOBAL-NEXT: addis 3, 2, .LCPI9_0@toc@ha
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; GLOBAL-NEXT: addi 3, 3, .LCPI9_0@toc@l
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; GLOBAL-NEXT: lfsx 0, 0, 3
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; GLOBAL-NEXT: xsmulsp 1, 1, 0
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; GLOBAL-NEXT: blr
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%mul = fmul fast float %x, 42.0
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%fma = call fast float @llvm.fma.f32(float %x, float 7.0, float %mul)
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ret float %fma
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}
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; Reduced precision for sqrt is allowed - should use estimate and NR iterations.
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; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'sqrt_afn:'
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; FMFDEBUG: fmul afn {{t[0-9]+}}
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; FMFDEBUG: Type-legalized selection DAG: %bb.0 'sqrt_afn:'
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; GLOBALDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'sqrt_afn:'
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; GLOBALDEBUG: fmul afn {{t[0-9]+}}
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; GLOBALDEBUG: Type-legalized selection DAG: %bb.0 'sqrt_afn:'
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define float @sqrt_afn(float %x) {
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; FMF-LABEL: sqrt_afn:
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; FMF: # %bb.0:
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; FMF-NEXT: xxlxor 0, 0, 0
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; FMF-NEXT: fcmpu 0, 1, 0
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; FMF-NEXT: beq 0, .LBB10_2
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; FMF-NEXT: # %bb.1:
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; FMF-NEXT: addis 3, 2, .LCPI10_0@toc@ha
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; FMF-NEXT: xsrsqrtesp 3, 1
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; FMF-NEXT: addi 3, 3, .LCPI10_0@toc@l
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; FMF-NEXT: lfsx 0, 0, 3
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; FMF-NEXT: xsmulsp 2, 1, 0
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; FMF-NEXT: xsmulsp 4, 3, 3
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; FMF-NEXT: xssubsp 2, 2, 1
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; FMF-NEXT: xsmulsp 2, 2, 4
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; FMF-NEXT: xssubsp 0, 0, 2
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; FMF-NEXT: xsmulsp 0, 3, 0
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; FMF-NEXT: xsmulsp 0, 0, 1
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; FMF-NEXT: .LBB10_2:
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; FMF-NEXT: fmr 1, 0
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; FMF-NEXT: blr
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;
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; GLOBAL-LABEL: sqrt_afn:
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; GLOBAL: # %bb.0:
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; GLOBAL-NEXT: xxlxor 0, 0, 0
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; GLOBAL-NEXT: fcmpu 0, 1, 0
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; GLOBAL-NEXT: beq 0, .LBB10_2
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; GLOBAL-NEXT: # %bb.1:
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; GLOBAL-NEXT: xsrsqrtesp 2, 1
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; GLOBAL-NEXT: fneg 0, 1
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; GLOBAL-NEXT: addis 3, 2, .LCPI10_0@toc@ha
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; GLOBAL-NEXT: fmr 4, 1
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; GLOBAL-NEXT: addi 3, 3, .LCPI10_0@toc@l
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; GLOBAL-NEXT: lfsx 3, 0, 3
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; GLOBAL-NEXT: xsmaddasp 4, 0, 3
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; GLOBAL-NEXT: xsmulsp 0, 2, 2
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; GLOBAL-NEXT: xsmaddasp 3, 4, 0
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; GLOBAL-NEXT: xsmulsp 0, 2, 3
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; GLOBAL-NEXT: xsmulsp 0, 0, 1
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; GLOBAL-NEXT: .LBB10_2:
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; GLOBAL-NEXT: fmr 1, 0
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; GLOBAL-NEXT: blr
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%rt = call afn float @llvm.sqrt.f32(float %x)
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ret float %rt
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}
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; The call is now fully 'fast'. This implies that approximation is allowed.
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; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'sqrt_fast:'
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; FMFDEBUG: fmul nnan ninf nsz arcp contract afn reassoc {{t[0-9]+}}
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; FMFDEBUG: Type-legalized selection DAG: %bb.0 'sqrt_fast:'
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; GLOBALDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'sqrt_fast:'
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; GLOBALDEBUG: fmul nnan ninf nsz arcp contract afn reassoc {{t[0-9]+}}
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; GLOBALDEBUG: Type-legalized selection DAG: %bb.0 'sqrt_fast:'
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define float @sqrt_fast(float %x) {
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; FMF-LABEL: sqrt_fast:
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; FMF: # %bb.0:
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; FMF-NEXT: xxlxor 0, 0, 0
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; FMF-NEXT: fcmpu 0, 1, 0
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; FMF-NEXT: beq 0, .LBB11_2
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; FMF-NEXT: # %bb.1:
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; FMF-NEXT: xsrsqrtesp 2, 1
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; FMF-NEXT: fneg 0, 1
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; FMF-NEXT: addis 3, 2, .LCPI11_0@toc@ha
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; FMF-NEXT: fmr 4, 1
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; FMF-NEXT: addi 3, 3, .LCPI11_0@toc@l
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; FMF-NEXT: lfsx 3, 0, 3
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; FMF-NEXT: xsmaddasp 4, 0, 3
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; FMF-NEXT: xsmulsp 0, 2, 2
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; FMF-NEXT: xsmaddasp 3, 4, 0
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; FMF-NEXT: xsmulsp 0, 2, 3
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; FMF-NEXT: xsmulsp 0, 0, 1
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; FMF-NEXT: .LBB11_2:
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; FMF-NEXT: fmr 1, 0
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; FMF-NEXT: blr
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;
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; GLOBAL-LABEL: sqrt_fast:
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; GLOBAL: # %bb.0:
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; GLOBAL-NEXT: xxlxor 0, 0, 0
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; GLOBAL-NEXT: fcmpu 0, 1, 0
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; GLOBAL-NEXT: beq 0, .LBB11_2
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|
; GLOBAL-NEXT: # %bb.1:
|
|
; GLOBAL-NEXT: xsrsqrtesp 2, 1
|
|
; GLOBAL-NEXT: fneg 0, 1
|
|
; GLOBAL-NEXT: addis 3, 2, .LCPI11_0@toc@ha
|
|
; GLOBAL-NEXT: fmr 4, 1
|
|
; GLOBAL-NEXT: addi 3, 3, .LCPI11_0@toc@l
|
|
; GLOBAL-NEXT: lfsx 3, 0, 3
|
|
; GLOBAL-NEXT: xsmaddasp 4, 0, 3
|
|
; GLOBAL-NEXT: xsmulsp 0, 2, 2
|
|
; GLOBAL-NEXT: xsmaddasp 3, 4, 0
|
|
; GLOBAL-NEXT: xsmulsp 0, 2, 3
|
|
; GLOBAL-NEXT: xsmulsp 0, 0, 1
|
|
; GLOBAL-NEXT: .LBB11_2:
|
|
; GLOBAL-NEXT: fmr 1, 0
|
|
; GLOBAL-NEXT: blr
|
|
%rt = call fast float @llvm.sqrt.f32(float %x)
|
|
ret float %rt
|
|
}
|
|
|
|
; fcmp can have fast-math-flags.
|
|
|
|
; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fcmp_nnan:'
|
|
; FMFDEBUG: select_cc {{t[0-9]+}}
|
|
; FMFDEBUG: Type-legalized selection DAG: %bb.0 'fcmp_nnan:'
|
|
|
|
; GLOBALDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fcmp_nnan:'
|
|
; GLOBALDEBUG: select_cc {{t[0-9]+}}
|
|
; GLOBALDEBUG: Type-legalized selection DAG: %bb.0 'fcmp_nnan:'
|
|
|
|
define double @fcmp_nnan(double %a, double %y, double %z) {
|
|
; FMF-LABEL: fcmp_nnan:
|
|
; FMF: # %bb.0:
|
|
; FMF-NEXT: xxlxor 0, 0, 0
|
|
; FMF-NEXT: xscmpudp 0, 1, 0
|
|
; FMF-NEXT: blt 0, .LBB12_2
|
|
; FMF-NEXT: # %bb.1:
|
|
; FMF-NEXT: fmr 3, 2
|
|
; FMF-NEXT: .LBB12_2:
|
|
; FMF-NEXT: fmr 1, 3
|
|
; FMF-NEXT: blr
|
|
;
|
|
; GLOBAL-LABEL: fcmp_nnan:
|
|
; GLOBAL: # %bb.0:
|
|
; GLOBAL-NEXT: xxlxor 0, 0, 0
|
|
; GLOBAL-NEXT: xscmpudp 0, 1, 0
|
|
; GLOBAL-NEXT: blt 0, .LBB12_2
|
|
; GLOBAL-NEXT: # %bb.1:
|
|
; GLOBAL-NEXT: fmr 3, 2
|
|
; GLOBAL-NEXT: .LBB12_2:
|
|
; GLOBAL-NEXT: fmr 1, 3
|
|
; GLOBAL-NEXT: blr
|
|
%cmp = fcmp nnan ult double %a, 0.0
|
|
%z.y = select i1 %cmp, double %z, double %y
|
|
ret double %z.y
|
|
}
|
|
|
|
; FP library calls can have fast-math-flags.
|
|
|
|
; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'log2_approx:'
|
|
; FMFDEBUG: ch,glue = PPCISD::CALL_NOP t11, TargetGlobalAddress:i64<double (double)* @log2>
|
|
; FMFDEBUG: ch,glue = callseq_end t15, TargetConstant:i64<32>, TargetConstant:i64<0>, t15:1
|
|
; FMFDEBUG: f64,ch,glue = CopyFromReg afn t16, Register:f64 $f1, t16:1
|
|
; FMFDEBUG: Type-legalized selection DAG: %bb.0 'log2_approx:'
|
|
|
|
; GLOBALDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'log2_approx:'
|
|
; GLOBALDEBUG: ch,glue = PPCISD::CALL_NOP t11, TargetGlobalAddress:i64<double (double)* @log2>
|
|
; GLOBALDEBUG: ch,glue = callseq_end t15, TargetConstant:i64<32>, TargetConstant:i64<0>, t15:1
|
|
; GLOBALDEBUG: f64,ch,glue = CopyFromReg afn t16, Register:f64 $f1, t16:1
|
|
; GLOBALDEBUG: Type-legalized selection DAG: %bb.0 'log2_approx:'
|
|
|
|
declare double @log2(double)
|
|
define double @log2_approx(double %x) nounwind {
|
|
; FMF-LABEL: log2_approx:
|
|
; FMF: # %bb.0:
|
|
; FMF-NEXT: mflr 0
|
|
; FMF-NEXT: std 0, 16(1)
|
|
; FMF-NEXT: stdu 1, -32(1)
|
|
; FMF-NEXT: bl log2
|
|
; FMF-NEXT: nop
|
|
; FMF-NEXT: addi 1, 1, 32
|
|
; FMF-NEXT: ld 0, 16(1)
|
|
; FMF-NEXT: mtlr 0
|
|
; FMF-NEXT: blr
|
|
;
|
|
; GLOBAL-LABEL: log2_approx:
|
|
; GLOBAL: # %bb.0:
|
|
; GLOBAL-NEXT: mflr 0
|
|
; GLOBAL-NEXT: std 0, 16(1)
|
|
; GLOBAL-NEXT: stdu 1, -32(1)
|
|
; GLOBAL-NEXT: bl log2
|
|
; GLOBAL-NEXT: nop
|
|
; GLOBAL-NEXT: addi 1, 1, 32
|
|
; GLOBAL-NEXT: ld 0, 16(1)
|
|
; GLOBAL-NEXT: mtlr 0
|
|
; GLOBAL-NEXT: blr
|
|
%r = call afn double @log2(double %x)
|
|
ret double %r
|
|
}
|
|
|
|
; -(X - Y) --> (Y - X)
|
|
|
|
; FMFDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fneg_fsub_nozeros_1:'
|
|
; FMFDEBUG: fsub nsz {{t[0-9]+}}, {{t[0-9]+}}
|
|
; FMFDEBUG: Type-legalized selection DAG: %bb.0 'fneg_fsub_nozeros_1:'
|
|
|
|
; GLOBALDEBUG-LABEL: Optimized lowered selection DAG: %bb.0 'fneg_fsub_nozeros_1:'
|
|
; GLOBALDEBUG: fsub nsz {{t[0-9]+}}, {{t[0-9]+}}
|
|
; GLOBALDEBUG: Type-legalized selection DAG: %bb.0 'fneg_fsub_nozeros_1:'
|
|
|
|
define float @fneg_fsub_nozeros_1(float %x, float %y, float %z) {
|
|
; FMF-LABEL: fneg_fsub_nozeros_1:
|
|
; FMF: # %bb.0:
|
|
; FMF-NEXT: xssubsp 1, 2, 1
|
|
; FMF-NEXT: blr
|
|
;
|
|
; GLOBAL-LABEL: fneg_fsub_nozeros_1:
|
|
; GLOBAL: # %bb.0:
|
|
; GLOBAL-NEXT: xssubsp 1, 2, 1
|
|
; GLOBAL-NEXT: blr
|
|
%neg = fsub float %x, %y
|
|
%add = fsub nsz float 0.0, %neg
|
|
ret float %add
|
|
}
|
|
|