llvm-project/llvm/test/CodeGen
Michael Berg bf90d1f263 Utilize new SDNode flag functionality to expand current support for fsub
Summary: This patch originated from D46562 and is a proper subset, with some issues addressed for fsub.

Reviewers: spatel, hfinkel, wristow, arsenm

Reviewed By: spatel

Subscribers: wdng

Differential Revision: https://reviews.llvm.org/D47910

llvm-svn: 334306
2018-06-08 17:39:50 +00:00
..
AArch64 [NFC][X86][AArch64] Reorganize/cleanup BZHI test patterns 2018-06-06 19:38:10 +00:00
AMDGPU [AMDGPU] Inline asm - added i16, half and i128 types support 2018-06-08 16:29:04 +00:00
ARC
ARM [AArch64, ARM] Add support for Samsung Exynos M4 2018-06-06 18:56:00 +00:00
AVR
BPF [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
Generic [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
Hexagon [Hexagon] Implement vector-pair zero as V6_vsubw_dv 2018-06-06 19:34:40 +00:00
Inputs
Lanai Remove SETCCE use from Lanai's backend 2018-06-03 12:56:24 +00:00
MIR [MIRParser] Add parser support for 'true' and 'false' i1s. 2018-06-05 00:17:13 +00:00
MSP430 Emit a left-shift instead of a power-of-two multiply for jump-tables 2018-05-16 08:58:26 +00:00
Mips [mips] Add testcase for i64, i128 addition for the DSP ASE 2018-06-06 13:30:39 +00:00
NVPTX [DAG] fold FP binops with undef operands to NaN 2018-05-21 23:54:19 +00:00
Nios2
PowerPC propagate fast math flags via IR on fma and sub expressions 2018-06-07 22:49:09 +00:00
RISCV [RISCV] Add peepholes for Global Address lowering patterns 2018-05-29 19:34:54 +00:00
SPARC [Sparc] Select correct register class for FP register constraints 2018-05-30 06:07:55 +00:00
SystemZ [BranchFolding] Fix live-in's when hoisting code 2018-06-07 07:20:33 +00:00
Thumb Reapply ARM: Do not spill CSR to stack on entry to noreturn functions 2018-04-07 10:57:03 +00:00
Thumb2 [Thumb2] fix typo in test from r332548 2018-05-17 03:24:25 +00:00
WebAssembly [WebAssembly] Update to the new names for the memory intrinsics. 2018-05-31 22:35:25 +00:00
WinCFGuard
WinEH [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00
X86 Utilize new SDNode flag functionality to expand current support for fsub 2018-06-08 17:39:50 +00:00
XCore [DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label. 2018-05-09 02:40:45 +00:00