forked from OSchip/llvm-project
112 lines
3.9 KiB
YAML
112 lines
3.9 KiB
YAML
# RUN: llc -march=amdgcn -run-pass=si-memory-legalizer %s -o - | FileCheck %s
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--- |
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declare i32 @llvm.amdgcn.workitem.id.x() #0
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define amdgpu_kernel void @atomic_max_i32_noret(
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i32 addrspace(1)* %out,
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i32 addrspace(1)* addrspace(1)* %in,
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i32 addrspace(1)* %x,
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i32 %y) #1 {
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%tid = call i32 @llvm.amdgcn.workitem.id.x()
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%idxprom = sext i32 %tid to i64
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%tid.gep = getelementptr i32 addrspace(1)*, i32 addrspace(1)* addrspace(1)* %in, i64 %idxprom
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%ptr = load volatile i32 addrspace(1)*, i32 addrspace(1)* addrspace(1)* %tid.gep
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%xor = xor i32 %tid, 1
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%cmp = icmp ne i32 %xor, 0
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%1 = call { i1, i64 } @llvm.amdgcn.if(i1 %cmp)
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%2 = extractvalue { i1, i64 } %1, 0
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%3 = extractvalue { i1, i64 } %1, 1
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br i1 %2, label %atomic, label %exit
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atomic: ; preds = %0
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%gep = getelementptr i32, i32 addrspace(1)* %ptr, i32 100
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%ret = atomicrmw max i32 addrspace(1)* %gep, i32 %y seq_cst
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br label %exit
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exit: ; preds = %atomic, %0
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call void @llvm.amdgcn.end.cf(i64 %3)
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ret void
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}
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declare { i1, i64 } @llvm.amdgcn.if(i1)
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declare void @llvm.amdgcn.end.cf(i64)
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attributes #0 = { nounwind readnone }
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attributes #1 = { nounwind "target-cpu"="gfx803" }
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...
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---
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# CHECK-LABEL: name: atomic_max_i32_noret
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# CHECK-LABEL: bb.1.atomic:
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# CHECK: BUFFER_ATOMIC_SMAX_ADDR64
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# CHECK-NEXT: S_WAITCNT 3952
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# CHECK-NEXT: BUFFER_WBINVL1_VOL
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name: atomic_max_i32_noret
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alignment: 1
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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liveins:
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- { reg: '$sgpr0_sgpr1' }
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- { reg: '$vgpr0' }
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 0
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adjustsStack: false
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hasCalls: false
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maxCallFrameSize: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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body: |
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bb.0 (%ir-block.0):
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successors: %bb.1.atomic(0x40000000), %bb.2.exit(0x40000000)
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liveins: $vgpr0, $sgpr0_sgpr1
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$sgpr4_sgpr5 = S_LOAD_DWORDX2_IMM $sgpr0_sgpr1, 11, 0, 0 :: (non-temporal dereferenceable invariant load 8 from `i64 addrspace(4)* undef`)
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$vgpr1 = V_ASHRREV_I32_e32 31, $vgpr0, implicit $exec
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$vgpr1_vgpr2 = V_LSHL_B64 $vgpr0_vgpr1, 3, implicit $exec
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$sgpr7 = S_MOV_B32 61440
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$sgpr6 = S_MOV_B32 0
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S_WAITCNT 127
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$vgpr1_vgpr2 = BUFFER_LOAD_DWORDX2_ADDR64 killed $vgpr1_vgpr2, $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (volatile load 8 from %ir.tid.gep)
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$vgpr0 = V_XOR_B32_e32 1, killed $vgpr0, implicit $exec
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V_CMP_NE_U32_e32 0, killed $vgpr0, implicit-def $vcc, implicit $exec
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$sgpr2_sgpr3 = S_AND_SAVEEXEC_B64 killed $vcc, implicit-def $exec, implicit-def $scc, implicit $exec
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$sgpr2_sgpr3 = S_XOR_B64 $exec, killed $sgpr2_sgpr3, implicit-def dead $scc
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SI_MASK_BRANCH %bb.2.exit, implicit $exec
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bb.1.atomic:
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successors: %bb.2.exit(0x80000000)
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liveins: $sgpr4_sgpr5_sgpr6_sgpr7:0x0000000C, $sgpr0_sgpr1, $sgpr2_sgpr3, $vgpr1_vgpr2_vgpr3_vgpr4:0x00000003
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$sgpr0 = S_LOAD_DWORD_IMM killed $sgpr0_sgpr1, 15, 0, 0 :: (non-temporal dereferenceable invariant load 4 from `i32 addrspace(4)* undef`)
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dead $vgpr0 = V_MOV_B32_e32 -1, implicit $exec
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dead $vgpr0 = V_MOV_B32_e32 61440, implicit $exec
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$sgpr4_sgpr5 = S_MOV_B64 0
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S_WAITCNT 127
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$vgpr0 = V_MOV_B32_e32 killed $sgpr0, implicit $exec, implicit $exec
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S_WAITCNT 3952
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BUFFER_ATOMIC_SMAX_ADDR64 killed $vgpr0, killed $vgpr1_vgpr2, killed $sgpr4_sgpr5_sgpr6_sgpr7, 0, 400, 0, implicit $exec :: (volatile load syncscope("one-as") seq_cst 4 from %ir.gep)
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bb.2.exit:
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liveins: $sgpr2_sgpr3
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$exec = S_OR_B64 $exec, killed $sgpr2_sgpr3, implicit-def $scc
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S_ENDPGM 0
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...
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