llvm-project/llvm/test/CodeGen
Zhaoshi Zheng 05b46dc300 [Thumb1] Any imm8 should have cost of 1
A simple MOVS rd, imm8 can materialize [-128, 127] in signed i8 type or
[0, 255] in unsigned i8 type on Thumb1.

Differential Revision: https://reviews.llvm.org/D52257

llvm-svn: 342898
2018-09-24 16:15:23 +00:00
..
AArch64 [DAGCombiner] use UADDO to optimize saturated unsigned add 2018-09-24 14:47:15 +00:00
AMDGPU AMDGPU: Fix private handling for allowsMisalignedMemoryAccesses 2018-09-24 13:18:15 +00:00
ARC
ARM [ARM] Do not fuse VADD and VMUL on the Cortex-M4 and Cortex-M33 2018-09-24 12:02:50 +00:00
AVR [AVR] Redefine the 'LSL' instruction as an alias of 'ADD' 2018-09-01 12:23:00 +00:00
BPF [bpf] Test case for symbol information in object file 2018-09-22 17:31:01 +00:00
Generic [MC/Dwarf] Unclamp DWARF linetables format on Darwin. 2018-09-13 13:13:50 +00:00
Hexagon [MachineVerifier] Relax checkLivenessAtDef regarding dead subreg defs 2018-09-20 06:59:18 +00:00
Inputs
Lanai
MIR add IR flags to MI 2018-09-11 21:35:32 +00:00
MSP430 [DAGCombiner] Add X / X -> 1 & X % X -> 0 folds (test tweaks) 2018-08-29 11:18:14 +00:00
Mips [Mips][FastISel] Fix selectBranch on icmp i1 2018-09-24 14:14:19 +00:00
NVPTX [NVPTX] Implement isLegalToVectorizeLoadChain 2018-08-27 17:29:43 +00:00
Nios2
PowerPC [PowerPC] Support operand modifier 'x' in inline asm 2018-09-24 14:01:16 +00:00
RISCV [RISCV] Codegen for i8, i16, and i32 atomicrmw with RV32A 2018-09-19 10:54:22 +00:00
SPARC [Sparc] Use ANDN instead of AND if constant can be encoded more efficiently 2018-08-30 14:05:26 +00:00
SystemZ [DAGCombiner] Add X / X -> 1 & X % X -> 0 folds (test tweaks) 2018-08-29 11:18:14 +00:00
Thumb [Thumb1] Any imm8 should have cost of 1 2018-09-24 16:15:23 +00:00
Thumb2 [ARM] Do not fuse VADD and VMUL on the Cortex-M4 and Cortex-M33 2018-09-24 12:02:50 +00:00
WebAssembly [WebAssembly][NFC] Rename simd-conversions test to simd-bitcasts 2018-09-21 18:46:39 +00:00
WinCFGuard [COFF] Emit @feat.00 on 64-bit and set the CFG bit when emitting guardcf tables 2018-09-19 09:58:30 +00:00
WinEH
X86 [X86] Split WriteIMul into 8/16/32/64 implementations (PR36931) 2018-09-24 15:21:57 +00:00
XCore [DAGCombiner] extend(ifpositive(X)) -> shift-right (not X) 2018-07-15 16:27:07 +00:00