llvm-project/llvm/test/CodeGen/X86/GlobalISel/x86_64-legalize-fptosi.mir

267 lines
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s
--- |
define signext i8 @float_to_int8(float %val) {
entry:
%conv = fptosi float %val to i8
ret i8 %conv
}
define signext i16 @float_to_int16(float %val) {
entry:
%conv = fptosi float %val to i16
ret i16 %conv
}
define i32 @float_to_int32(float %val) {
entry:
%conv = fptosi float %val to i32
ret i32 %conv
}
define i64 @float_to_int64(float %val) {
entry:
%conv = fptosi float %val to i64
ret i64 %conv
}
define signext i8 @double_to_int8(double %val) {
entry:
%conv = fptosi double %val to i8
ret i8 %conv
}
define signext i16 @double_to_int16(double %val) {
entry:
%conv = fptosi double %val to i16
ret i16 %conv
}
define i32 @double_to_int32(double %val) {
entry:
%conv = fptosi double %val to i32
ret i32 %conv
}
define i64 @double_to_int64(double %val) {
entry:
%conv = fptosi double %val to i64
ret i64 %conv
}
...
---
name: float_to_int8
alignment: 4
tracksRegLiveness: true
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.1.entry:
liveins: $xmm0
; CHECK-LABEL: name: float_to_int8
; CHECK: liveins: $xmm0
; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s128)
; CHECK: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[TRUNC]](s32)
; CHECK: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[FPTOSI]](s32)
; CHECK: $al = COPY [[TRUNC1]](s8)
; CHECK: RET 0, implicit $al
%1:_(s128) = COPY $xmm0
%0:_(s32) = G_TRUNC %1(s128)
%2:_(s8) = G_FPTOSI %0(s32)
$al = COPY %2(s8)
RET 0, implicit $al
...
---
name: float_to_int16
alignment: 4
tracksRegLiveness: true
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.1.entry:
liveins: $xmm0
; CHECK-LABEL: name: float_to_int16
; CHECK: liveins: $xmm0
; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s128)
; CHECK: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[TRUNC]](s32)
; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[FPTOSI]](s32)
; CHECK: $ax = COPY [[TRUNC1]](s16)
; CHECK: RET 0, implicit $ax
%1:_(s128) = COPY $xmm0
%0:_(s32) = G_TRUNC %1(s128)
%2:_(s16) = G_FPTOSI %0(s32)
$ax = COPY %2(s16)
RET 0, implicit $ax
...
---
name: float_to_int32
alignment: 4
tracksRegLiveness: true
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.1.entry:
liveins: $xmm0
; CHECK-LABEL: name: float_to_int32
; CHECK: liveins: $xmm0
; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s128)
; CHECK: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[TRUNC]](s32)
; CHECK: $eax = COPY [[FPTOSI]](s32)
; CHECK: RET 0, implicit $eax
%1:_(s128) = COPY $xmm0
%0:_(s32) = G_TRUNC %1(s128)
%2:_(s32) = G_FPTOSI %0(s32)
$eax = COPY %2(s32)
RET 0, implicit $eax
...
---
name: float_to_int64
alignment: 4
tracksRegLiveness: true
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.1.entry:
liveins: $xmm0
; CHECK-LABEL: name: float_to_int64
; CHECK: liveins: $xmm0
; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s128)
; CHECK: [[FPTOSI:%[0-9]+]]:_(s64) = G_FPTOSI [[TRUNC]](s32)
; CHECK: $rax = COPY [[FPTOSI]](s64)
; CHECK: RET 0, implicit $rax
%1:_(s128) = COPY $xmm0
%0:_(s32) = G_TRUNC %1(s128)
%2:_(s64) = G_FPTOSI %0(s32)
$rax = COPY %2(s64)
RET 0, implicit $rax
...
---
name: double_to_int8
alignment: 4
tracksRegLiveness: true
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.1.entry:
liveins: $xmm0
; CHECK-LABEL: name: double_to_int8
; CHECK: liveins: $xmm0
; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
; CHECK: [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[COPY]](s128)
; CHECK: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[TRUNC]](s64)
; CHECK: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[FPTOSI]](s32)
; CHECK: $al = COPY [[TRUNC1]](s8)
; CHECK: RET 0, implicit $al
%1:_(s128) = COPY $xmm0
%0:_(s64) = G_TRUNC %1(s128)
%2:_(s8) = G_FPTOSI %0(s64)
$al = COPY %2(s8)
RET 0, implicit $al
...
---
name: double_to_int16
alignment: 4
tracksRegLiveness: true
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.1.entry:
liveins: $xmm0
; CHECK-LABEL: name: double_to_int16
; CHECK: liveins: $xmm0
; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
; CHECK: [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[COPY]](s128)
; CHECK: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[TRUNC]](s64)
; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[FPTOSI]](s32)
; CHECK: $ax = COPY [[TRUNC1]](s16)
; CHECK: RET 0, implicit $ax
%1:_(s128) = COPY $xmm0
%0:_(s64) = G_TRUNC %1(s128)
%2:_(s16) = G_FPTOSI %0(s64)
$ax = COPY %2(s16)
RET 0, implicit $ax
...
---
name: double_to_int32
alignment: 4
tracksRegLiveness: true
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.1.entry:
liveins: $xmm0
; CHECK-LABEL: name: double_to_int32
; CHECK: liveins: $xmm0
; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
; CHECK: [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[COPY]](s128)
; CHECK: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[TRUNC]](s64)
; CHECK: $eax = COPY [[FPTOSI]](s32)
; CHECK: RET 0, implicit $eax
%1:_(s128) = COPY $xmm0
%0:_(s64) = G_TRUNC %1(s128)
%2:_(s32) = G_FPTOSI %0(s64)
$eax = COPY %2(s32)
RET 0, implicit $eax
...
---
name: double_to_int64
alignment: 4
tracksRegLiveness: true
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
body: |
bb.1.entry:
liveins: $xmm0
; CHECK-LABEL: name: double_to_int64
; CHECK: liveins: $xmm0
; CHECK: [[COPY:%[0-9]+]]:_(s128) = COPY $xmm0
; CHECK: [[TRUNC:%[0-9]+]]:_(s64) = G_TRUNC [[COPY]](s128)
; CHECK: [[FPTOSI:%[0-9]+]]:_(s64) = G_FPTOSI [[TRUNC]](s64)
; CHECK: $rax = COPY [[FPTOSI]](s64)
; CHECK: RET 0, implicit $rax
%1:_(s128) = COPY $xmm0
%0:_(s64) = G_TRUNC %1(s128)
%2:_(s64) = G_FPTOSI %0(s64)
$rax = COPY %2(s64)
RET 0, implicit $rax
...