llvm-project/llvm/test/CodeGen/AVR/relax-mem/STDWPtrQRr.mir

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# RUN: llc -O0 -run-pass=avr-relax-mem %s -o - | FileCheck %s
--- |
target triple = "avr--"
define void @test() {
entry:
ret void
}
...
---
name: test
body: |
bb.0.entry:
; CHECK-LABEL: test
; We shouldn't expand things which already have 6-bit imms.
; CHECK: STDWPtrQRr $r29r28, 63, $r1r0
STDWPtrQRr $r29r28, 63, $r1r0
; We shouldn't expand things which already have 6-bit imms.
; CHECK-NEXT: STDWPtrQRr $r29r28, 0, $r1r0
STDWPtrQRr $r29r28, 0, $r1r0
; CHECK-NEXT: PUSHWRr $r29r28, implicit-def $sp, implicit $sp
; CHECK-NEXT: $r29r28 = SBCIWRdK $r29r28, -64, implicit-def $sreg, implicit $sreg
; CHECK-NEXT: STWPtrRr $r29r28, $r1r0
; CHECK-NEXT: POPWRd $r29r28, implicit-def $sp, implicit $sp
STDWPtrQRr $r29r28, 64, $r1r0
...