forked from OSchip/llvm-project
91 lines
2.6 KiB
LLVM
91 lines
2.6 KiB
LLVM
; XFAIL: *
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; RUN: opt -S -basic-aa -newgvn < %s | FileCheck %s
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@a = external constant i32
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; We can value forward across the fence since we can (semantically)
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; reorder the following load before the fence.
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define i32 @test(i32* %addr.i) {
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; CHECK-LABEL: @test
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; CHECK: store
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; CHECK: fence
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; CHECK-NOT: load
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; CHECK: ret
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store i32 5, i32* %addr.i, align 4
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fence release
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%a = load i32, i32* %addr.i, align 4
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ret i32 %a
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}
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; Same as above
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define i32 @test2(i32* %addr.i) {
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; CHECK-LABEL: @test2
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; CHECK-NEXT: fence
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; CHECK-NOT: load
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; CHECK: ret
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%a = load i32, i32* %addr.i, align 4
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fence release
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%a2 = load i32, i32* %addr.i, align 4
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%res = sub i32 %a, %a2
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ret i32 %res
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}
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; We can not value forward across an acquire barrier since we might
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; be syncronizing with another thread storing to the same variable
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; followed by a release fence. This is not so much enforcing an
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; ordering property (though it is that too), but a liveness
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; property. We expect to eventually see the value of store by
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; another thread when spinning on that location.
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define i32 @test3(i32* noalias %addr.i, i32* noalias %otheraddr) {
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; CHECK-LABEL: @test3
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; CHECK: load
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; CHECK: fence
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; CHECK: load
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; CHECK: ret i32 %res
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; the following code is intented to model the unrolling of
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; two iterations in a spin loop of the form:
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; do { fence acquire: tmp = *%addr.i; ) while (!tmp);
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; It's hopefully clear that allowing PRE to turn this into:
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; if (!*%addr.i) while(true) {} would be unfortunate
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fence acquire
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%a = load i32, i32* %addr.i, align 4
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fence acquire
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%a2 = load i32, i32* %addr.i, align 4
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%res = sub i32 %a, %a2
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ret i32 %res
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}
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; We can forward the value forward the load
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; across both the fences, because the load is from
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; a constant memory location.
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define i32 @test4(i32* %addr) {
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; CHECK-LABEL: @test4
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; CHECK-NOT: load
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; CHECK: fence release
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; CHECK: store
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; CHECK: fence seq_cst
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; CHECK: ret i32 0
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%var = load i32, i32* @a
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fence release
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store i32 42, i32* %addr, align 8
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fence seq_cst
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%var2 = load i32, i32* @a
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%var3 = sub i32 %var, %var2
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ret i32 %var3
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}
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; Another example of why forwarding across an acquire fence is problematic
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; can be seen in a normal locking operation. Say we had:
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; *p = 5; unlock(l); lock(l); use(p);
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; forwarding the store to p would be invalid. A reasonable implementation
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; of unlock and lock might be:
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; unlock() { atomicrmw sub %l, 1 unordered; fence release }
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; lock() {
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; do {
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; %res = cmpxchg %p, 0, 1, monotonic monotonic
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; } while(!%res.success)
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; fence acquire;
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; }
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; Given we chose to forward across the release fence, we clearly can't forward
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; across the acquire fence as well.
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