llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sbfx.mir

105 lines
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer %s -o - | FileCheck --check-prefix=GCN %s
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -O0 -run-pass=legalizer %s -o - | FileCheck --check-prefix=GCN %s
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -O0 -run-pass=legalizer %s -o - | FileCheck --check-prefix=GCN %s
...
---
name: test_sbfx_s32
body: |
bb.0.entry:
liveins: $vgpr0, $vgpr1, $vgpr2
; GCN-LABEL: name: test_sbfx_s32
; GCN: %copy:_(s32) = COPY $vgpr0
; GCN: %offset:_(s32) = COPY $vgpr1
; GCN: %width:_(s32) = COPY $vgpr2
; GCN: %sbfx:_(s32) = G_SBFX %copy, %offset(s32), %width
; GCN: $vgpr0 = COPY %sbfx(s32)
%copy:_(s32) = COPY $vgpr0
%offset:_(s32) = COPY $vgpr1
%width:_(s32) = COPY $vgpr2
%sbfx:_(s32) = G_SBFX %copy, %offset(s32), %width
$vgpr0 = COPY %sbfx(s32)
...
---
name: test_sbfx_s64
body: |
bb.0.entry:
liveins: $vgpr0_vgpr1, $vgpr2, $vgpr3
; GVN-LABEL: name: test_sbfx_s64
; GVN: %copy:_(s64) = COPY $vgpr0_vgpr1
; GVN: %offset:_(s32) = COPY $vgpr2
; GVN: %width:_(s32) = COPY $vgpr3
; GVN: %sbfx:_(s64) = G_SBFX %copy, %offset(s32), %width
; GVN: $vgpr0_vgpr1 = COPY %sbfx(s64)
%copy:_(s64) = COPY $vgpr0_vgpr1
%offset:_(s32) = COPY $vgpr2
%width:_(s32) = COPY $vgpr3
%sbfx:_(s64) = G_SBFX %copy, %offset(s32), %width
$vgpr0_vgpr1 = COPY %sbfx(s64)
...
---
name: test_sbfx_s8
body: |
bb.0.entry:
liveins: $vgpr0, $vgpr1, $vgpr2
; GVN-LABEL: name: test_sbfx_s8
; GVN: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; GVN: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; GVN: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
; GVN: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
; GVN: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
; GVN: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C]]
; GVN: [[COPY4:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32)
; GVN: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C]]
; GVN: [[COPY5:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; GVN: [[SBFX:%[0-9]+]]:_(s32) = G_SBFX [[COPY5]], [[AND]](s32), [[AND1]]
; GVN: [[COPY6:%[0-9]+]]:_(s32) = COPY [[SBFX]](s32)
; GVN: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY6]], 8
; GVN: $vgpr0 = COPY [[SEXT_INREG]](s32)
%0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $vgpr1
%2:_(s32) = COPY $vgpr2
%copy:_(s8) = G_TRUNC %0
%offset:_(s8) = G_TRUNC %1
%width:_(s8) = G_TRUNC %2
%sbfx:_(s8) = G_SBFX %copy, %offset, %width
%4:_(s32) = G_SEXT %sbfx
$vgpr0 = COPY %4
...
---
name: test_sbfx_s16
body: |
bb.0.entry:
liveins: $vgpr0, $vgpr1, $vgpr2
; GVN-LABEL: name: test_sbfx_s16
; GVN: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; GVN: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
; GVN: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
; GVN: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; GVN: [[COPY3:%[0-9]+]]:_(s32) = COPY [[COPY1]](s32)
; GVN: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C]]
; GVN: [[COPY4:%[0-9]+]]:_(s32) = COPY [[COPY2]](s32)
; GVN: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C]]
; GVN: [[COPY5:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; GVN: [[SBFX:%[0-9]+]]:_(s32) = G_SBFX [[COPY5]], [[AND]](s32), [[AND1]]
; GVN: [[COPY6:%[0-9]+]]:_(s32) = COPY [[SBFX]](s32)
; GVN: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY6]], 16
; GVN: $vgpr0 = COPY [[SEXT_INREG]](s32)
%0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $vgpr1
%2:_(s32) = COPY $vgpr2
%copy:_(s16) = G_TRUNC %0
%offset:_(s16) = G_TRUNC %1
%width:_(s16) = G_TRUNC %2
%sbfx:_(s16) = G_SBFX %copy, %offset, %width
%4:_(s32) = G_SEXT %sbfx
$vgpr0 = COPY %4
...