forked from OSchip/llvm-project
146 lines
4.0 KiB
LLVM
146 lines
4.0 KiB
LLVM
; RUN: llc -verify-machineinstrs -mtriple=arm64-linux-gnu -pre-RA-sched=linearize -enable-misched=false -disable-post-ra < %s | FileCheck %s
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%va_list = type {i8*, i8*, i8*, i32, i32}
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@var = global %va_list zeroinitializer, align 8
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declare void @llvm.va_start(i8*)
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define void @test_simple(i32 %n, ...) {
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; CHECK-LABEL: test_simple:
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; CHECK: sub sp, sp, #[[STACKSIZE:[0-9]+]]
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; CHECK: add [[STACK_TOP:x[0-9]+]], sp, #[[STACKSIZE]]
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; CHECK: adrp x[[VA_LIST_HI:[0-9]+]], var
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; CHECK: add x[[VA_LIST:[0-9]+]], {{x[0-9]+}}, :lo12:var
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; CHECK: stp x1, x2, [sp, #[[GR_BASE:[0-9]+]]]
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; ... omit middle ones ...
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; CHECK: str x7, [sp, #
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; CHECK: stp q0, q1, [sp]
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; ... omit middle ones ...
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; CHECK: stp q6, q7, [sp, #
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; CHECK: str [[STACK_TOP]], [x[[VA_LIST]]]
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; CHECK: add [[GR_TOPTMP:x[0-9]+]], sp, #[[GR_BASE]]
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; CHECK: add [[GR_TOP:x[0-9]+]], [[GR_TOPTMP]], #56
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; CHECK: str [[GR_TOP]], [x[[VA_LIST]], #8]
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; CHECK: mov [[VR_TOPTMP:x[0-9]+]], sp
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; CHECK: add [[VR_TOP:x[0-9]+]], [[VR_TOPTMP]], #128
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; CHECK: str [[VR_TOP]], [x[[VA_LIST]], #16]
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; CHECK: movn [[GR_OFFS:w[0-9]+]], #0x37
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; CHECK: str [[GR_OFFS]], [x[[VA_LIST]], #24]
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; CHECK: orr [[VR_OFFS:w[0-9]+]], wzr, #0xffffff80
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; CHECK: str [[VR_OFFS]], [x[[VA_LIST]], #28]
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%addr = bitcast %va_list* @var to i8*
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call void @llvm.va_start(i8* %addr)
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ret void
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}
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define void @test_fewargs(i32 %n, i32 %n1, i32 %n2, float %m, ...) {
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; CHECK-LABEL: test_fewargs:
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; CHECK: sub sp, sp, #[[STACKSIZE:[0-9]+]]
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; CHECK: add [[STACK_TOP:x[0-9]+]], sp, #[[STACKSIZE]]
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; CHECK: adrp x[[VA_LIST_HI:[0-9]+]], var
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; CHECK: add x[[VA_LIST:[0-9]+]], {{x[0-9]+}}, :lo12:var
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; CHECK: stp x3, x4, [sp, #[[GR_BASE:[0-9]+]]]
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; ... omit middle ones ...
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; CHECK: str x7, [sp, #
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; CHECK: stp q1, q2, [sp]
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; ... omit middle ones ...
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; CHECK: str q7, [sp, #
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; CHECK: str [[STACK_TOP]], [x[[VA_LIST]]]
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; CHECK: add [[GR_TOPTMP:x[0-9]+]], sp, #[[GR_BASE]]
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; CHECK: add [[GR_TOP:x[0-9]+]], [[GR_TOPTMP]], #40
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; CHECK: str [[GR_TOP]], [x[[VA_LIST]], #8]
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; CHECK: mov [[VR_TOPTMP:x[0-9]+]], sp
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; CHECK: add [[VR_TOP:x[0-9]+]], [[VR_TOPTMP]], #112
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; CHECK: str [[VR_TOP]], [x[[VA_LIST]], #16]
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; CHECK: movn [[GR_OFFS:w[0-9]+]], #0x27
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; CHECK: str [[GR_OFFS]], [x[[VA_LIST]], #24]
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; CHECK: movn [[VR_OFFS:w[0-9]+]], #0x6f
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; CHECK: str [[VR_OFFS]], [x[[VA_LIST]], #28]
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%addr = bitcast %va_list* @var to i8*
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call void @llvm.va_start(i8* %addr)
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ret void
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}
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define void @test_nospare([8 x i64], [8 x float], ...) {
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; CHECK-LABEL: test_nospare:
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%addr = bitcast %va_list* @var to i8*
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call void @llvm.va_start(i8* %addr)
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; CHECK-NOT: sub sp, sp
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; CHECK: mov [[STACK:x[0-9]+]], sp
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; CHECK: add x[[VAR:[0-9]+]], {{x[0-9]+}}, :lo12:var
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; CHECK: str [[STACK]], [x[[VAR]]]
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ret void
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}
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; If there are non-variadic arguments on the stack (here two i64s) then the
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; __stack field should point just past them.
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define void @test_offsetstack([8 x i64], [2 x i64], [3 x float], ...) {
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; CHECK-LABEL: test_offsetstack:
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; CHECK: sub sp, sp, #80
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; CHECK: add [[STACK_TOP:x[0-9]+]], sp, #96
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; CHECK: add x[[VAR:[0-9]+]], {{x[0-9]+}}, :lo12:var
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; CHECK: str [[STACK_TOP]], [x[[VAR]]]
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%addr = bitcast %va_list* @var to i8*
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call void @llvm.va_start(i8* %addr)
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ret void
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}
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declare void @llvm.va_end(i8*)
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define void @test_va_end() nounwind {
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; CHECK-LABEL: test_va_end:
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; CHECK-NEXT: BB#0
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%addr = bitcast %va_list* @var to i8*
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call void @llvm.va_end(i8* %addr)
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ret void
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; CHECK-NEXT: ret
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}
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declare void @llvm.va_copy(i8* %dest, i8* %src)
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@second_list = global %va_list zeroinitializer
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define void @test_va_copy() {
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; CHECK-LABEL: test_va_copy:
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%srcaddr = bitcast %va_list* @var to i8*
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%dstaddr = bitcast %va_list* @second_list to i8*
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call void @llvm.va_copy(i8* %dstaddr, i8* %srcaddr)
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; CHECK: add x[[SRC:[0-9]+]], {{x[0-9]+}}, :lo12:var
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; CHECK: ldr [[BLOCK:q[0-9]+]], [x[[SRC]]]
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; CHECK: add x[[DST:[0-9]+]], {{x[0-9]+}}, :lo12:second_list
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; CHECK: str [[BLOCK]], [x[[DST]]]
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; CHECK: ldr [[BLOCK:q[0-9]+]], [x[[SRC]], #16]
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; CHECK: str [[BLOCK]], [x[[DST]], #16]
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ret void
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; CHECK: ret
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}
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