forked from OSchip/llvm-project
36 lines
2.0 KiB
LLVM
36 lines
2.0 KiB
LLVM
; RUN: opt %loadPolly -polly-print-scops -disable-output < %s -stats 2>&1 | FileCheck %s --check-prefix=RTA
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; RUN: opt %loadPolly -polly-print-scops -polly-use-runtime-alias-checks=false -disable-output < %s -stats 2>&1 | FileCheck %s --check-prefix=NORTA
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; REQUIRES: asserts
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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define void @f(i32** nocapture %ptrs, i64 %p0, i64 %p1, i64 %p2) nounwind {
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bb.nph:
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%0 = getelementptr inbounds i32*, i32** %ptrs, i64 %p0 ; <i32**> [#uses=1]
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%1 = load i32*, i32** %0, align 8 ; <i32*> [#uses=1]
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%2 = getelementptr inbounds i32*, i32** %ptrs, i64 %p1 ; <i32**> [#uses=1]
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%3 = load i32*, i32** %2, align 8 ; <i32*> [#uses=1]
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%4 = getelementptr inbounds i32*, i32** %ptrs, i64 %p2 ; <i32**> [#uses=1]
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%5 = load i32*, i32** %4, align 8 ; <i32*> [#uses=1]
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br label %bb
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bb: ; preds = %bb, %bb.nph
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%i.03 = phi i64 [ 0, %bb.nph ], [ %tmp, %bb ] ; <i64> [#uses=3]
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%scevgep = getelementptr i32, i32* %3, i64 %i.03 ; <i32*> [#uses=1]
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%scevgep4 = getelementptr i32, i32* %5, i64 %i.03 ; <i32*> [#uses=1]
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%tmp = add i64 %i.03, 1 ; <i64> [#uses=3]
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%scevgep5 = getelementptr i32, i32* %1, i64 %tmp ; <i32*> [#uses=1]
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%6 = load i32, i32* %scevgep, align 4 ; <i32> [#uses=1]
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%7 = load i32, i32* %scevgep4, align 4 ; <i32> [#uses=1]
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%8 = add nsw i32 %7, %6 ; <i32> [#uses=1]
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store i32 %8, i32* %scevgep5, align 4
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%exitcond = icmp eq i64 %tmp, 64 ; <i1> [#uses=1]
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br i1 %exitcond, label %return, label %bb
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return: ; preds = %bb
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ret void
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}
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; RTA: 1 polly-detect - Number of scops
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; NORTA: 1 polly-detect - Number of rejected regions: Base address aliasing
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