forked from OSchip/llvm-project
103 lines
3.0 KiB
LLVM
103 lines
3.0 KiB
LLVM
; RUN: llc < %s -mtriple=ve-unknown-unknown | FileCheck %s
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define i64 @selectccsgti8(i8, i8, i64, i64) {
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; CHECK-LABEL: selectccsgti8:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: sla.w.sx %s1, %s1, 24
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; CHECK-NEXT: sra.w.sx %s1, %s1, 24
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; CHECK-NEXT: sla.w.sx %s0, %s0, 24
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; CHECK-NEXT: sra.w.sx %s0, %s0, 24
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; CHECK-NEXT: cmps.w.sx %s0, %s0, %s1
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; CHECK-NEXT: cmov.w.gt %s3, %s2, %s0
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; CHECK-NEXT: or %s0, 0, %s3
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; CHECK-NEXT: or %s11, 0, %s9
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%5 = icmp sgt i8 %0, %1
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%6 = select i1 %5, i64 %2, i64 %3
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ret i64 %6
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}
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define i64 @selectccsgti16(i16, i16, i64, i64) {
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; CHECK-LABEL: selectccsgti16:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: sla.w.sx %s1, %s1, 16
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; CHECK-NEXT: sra.w.sx %s1, %s1, 16
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; CHECK-NEXT: sla.w.sx %s0, %s0, 16
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; CHECK-NEXT: sra.w.sx %s0, %s0, 16
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; CHECK-NEXT: cmps.w.sx %s0, %s0, %s1
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; CHECK-NEXT: cmov.w.gt %s3, %s2, %s0
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; CHECK-NEXT: or %s0, 0, %s3
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; CHECK-NEXT: or %s11, 0, %s9
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%5 = icmp sgt i16 %0, %1
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%6 = select i1 %5, i64 %2, i64 %3
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ret i64 %6
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}
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define i64 @selectccsgti32(i32, i32, i64, i64) {
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; CHECK-LABEL: selectccsgti32:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: cmps.w.sx %s0, %s0, %s1
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; CHECK-NEXT: cmov.w.gt %s3, %s2, %s0
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; CHECK-NEXT: or %s0, 0, %s3
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; CHECK-NEXT: or %s11, 0, %s9
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%5 = icmp sgt i32 %0, %1
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%6 = select i1 %5, i64 %2, i64 %3
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ret i64 %6
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}
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define i64 @selectccsgti64(i64, i64, i64, i64) {
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; CHECK-LABEL: selectccsgti64:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: cmps.l %s0, %s0, %s1
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; CHECK-NEXT: cmov.l.gt %s3, %s2, %s0
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; CHECK-NEXT: or %s0, 0, %s3
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; CHECK-NEXT: or %s11, 0, %s9
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%5 = icmp sgt i64 %0, %1
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%6 = select i1 %5, i64 %2, i64 %3
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ret i64 %6
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}
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define i64 @selectccsgti128(i128, i128, i64, i64) {
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; CHECK-LABEL: selectccsgti128:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: or %s6, 0, (0)1
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; CHECK-NEXT: cmps.l %s1, %s1, %s3
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; CHECK-NEXT: or %s3, 0, %s6
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; CHECK-NEXT: cmov.l.gt %s3, (63)0, %s1
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; CHECK-NEXT: cmpu.l %s0, %s0, %s2
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; CHECK-NEXT: cmov.l.gt %s6, (63)0, %s0
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; CHECK-NEXT: cmov.l.eq %s3, %s6, %s1
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; CHECK-NEXT: or %s0, 0, (0)1
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; CHECK-NEXT: cmps.w.sx %s0, %s3, %s0
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; CHECK-NEXT: cmov.w.ne %s5, %s4, %s0
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; CHECK-NEXT: or %s0, 0, %s5
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; CHECK-NEXT: or %s11, 0, %s9
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%5 = icmp sgt i128 %0, %1
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%6 = select i1 %5, i64 %2, i64 %3
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ret i64 %6
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}
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define i64 @selectccogtf32(float, float, i64, i64) {
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; CHECK-LABEL: selectccogtf32:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: fcmp.s %s0, %s0, %s1
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; CHECK-NEXT: cmov.s.gt %s3, %s2, %s0
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; CHECK-NEXT: or %s0, 0, %s3
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; CHECK-NEXT: or %s11, 0, %s9
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%5 = fcmp ogt float %0, %1
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%6 = select i1 %5, i64 %2, i64 %3
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ret i64 %6
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}
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define i64 @selectccogtf64(double, double, i64, i64) {
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; CHECK-LABEL: selectccogtf64:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: fcmp.d %s0, %s0, %s1
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; CHECK-NEXT: cmov.d.gt %s3, %s2, %s0
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; CHECK-NEXT: or %s0, 0, %s3
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; CHECK-NEXT: or %s11, 0, %s9
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%5 = fcmp ogt double %0, %1
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%6 = select i1 %5, i64 %2, i64 %3
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ret i64 %6
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}
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