forked from OSchip/llvm-project
211 lines
7.5 KiB
C++
211 lines
7.5 KiB
C++
//===-- UnreachableBlockElim.cpp - Remove unreachable blocks for codegen --===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass is an extremely simple version of the SimplifyCFG pass. Its sole
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// job is to delete LLVM basic blocks that are not reachable from the entry
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// node. To do this, it performs a simple depth first traversal of the CFG,
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// then deletes any unvisited nodes.
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//
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// Note that this pass is really a hack. In particular, the instruction
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// selectors for various targets should just not generate code for unreachable
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// blocks. Until LLVM has a more systematic way of defining instruction
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// selectors, however, we cannot really expect them to handle additional
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// complexity.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/UnreachableBlockElim.h"
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#include "llvm/ADT/DepthFirstIterator.h"
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#include "llvm/ADT/SmallPtrSet.h"
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineLoopInfo.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/TargetInstrInfo.h"
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#include "llvm/IR/CFG.h"
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#include "llvm/IR/Constant.h"
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#include "llvm/IR/Dominators.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/Type.h"
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#include "llvm/Pass.h"
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#include "llvm/Transforms/Utils/BasicBlockUtils.h"
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using namespace llvm;
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namespace {
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class UnreachableBlockElimLegacyPass : public FunctionPass {
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bool runOnFunction(Function &F) override {
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return llvm::EliminateUnreachableBlocks(F);
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}
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public:
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static char ID; // Pass identification, replacement for typeid
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UnreachableBlockElimLegacyPass() : FunctionPass(ID) {
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initializeUnreachableBlockElimLegacyPassPass(
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*PassRegistry::getPassRegistry());
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}
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.addPreserved<DominatorTreeWrapperPass>();
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}
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};
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}
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char UnreachableBlockElimLegacyPass::ID = 0;
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INITIALIZE_PASS(UnreachableBlockElimLegacyPass, "unreachableblockelim",
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"Remove unreachable blocks from the CFG", false, false)
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FunctionPass *llvm::createUnreachableBlockEliminationPass() {
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return new UnreachableBlockElimLegacyPass();
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}
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PreservedAnalyses UnreachableBlockElimPass::run(Function &F,
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FunctionAnalysisManager &AM) {
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bool Changed = llvm::EliminateUnreachableBlocks(F);
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if (!Changed)
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return PreservedAnalyses::all();
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PreservedAnalyses PA;
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PA.preserve<DominatorTreeAnalysis>();
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return PA;
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}
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namespace {
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class UnreachableMachineBlockElim : public MachineFunctionPass {
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bool runOnMachineFunction(MachineFunction &F) override;
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void getAnalysisUsage(AnalysisUsage &AU) const override;
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MachineModuleInfo *MMI;
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public:
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static char ID; // Pass identification, replacement for typeid
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UnreachableMachineBlockElim() : MachineFunctionPass(ID) {}
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};
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}
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char UnreachableMachineBlockElim::ID = 0;
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INITIALIZE_PASS(UnreachableMachineBlockElim, "unreachable-mbb-elimination",
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"Remove unreachable machine basic blocks", false, false)
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char &llvm::UnreachableMachineBlockElimID = UnreachableMachineBlockElim::ID;
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void UnreachableMachineBlockElim::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addPreserved<MachineLoopInfo>();
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AU.addPreserved<MachineDominatorTree>();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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bool UnreachableMachineBlockElim::runOnMachineFunction(MachineFunction &F) {
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df_iterator_default_set<MachineBasicBlock*> Reachable;
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bool ModifiedPHI = false;
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MMI = getAnalysisIfAvailable<MachineModuleInfo>();
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MachineDominatorTree *MDT = getAnalysisIfAvailable<MachineDominatorTree>();
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MachineLoopInfo *MLI = getAnalysisIfAvailable<MachineLoopInfo>();
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// Mark all reachable blocks.
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for (MachineBasicBlock *BB : depth_first_ext(&F, Reachable))
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(void)BB/* Mark all reachable blocks */;
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// Loop over all dead blocks, remembering them and deleting all instructions
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// in them.
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std::vector<MachineBasicBlock*> DeadBlocks;
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for (MachineFunction::iterator I = F.begin(), E = F.end(); I != E; ++I) {
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MachineBasicBlock *BB = &*I;
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// Test for deadness.
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if (!Reachable.count(BB)) {
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DeadBlocks.push_back(BB);
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// Update dominator and loop info.
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if (MLI) MLI->removeBlock(BB);
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if (MDT && MDT->getNode(BB)) MDT->eraseNode(BB);
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while (BB->succ_begin() != BB->succ_end()) {
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MachineBasicBlock* succ = *BB->succ_begin();
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MachineBasicBlock::iterator start = succ->begin();
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while (start != succ->end() && start->isPHI()) {
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for (unsigned i = start->getNumOperands() - 1; i >= 2; i-=2)
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if (start->getOperand(i).isMBB() &&
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start->getOperand(i).getMBB() == BB) {
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start->RemoveOperand(i);
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start->RemoveOperand(i-1);
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}
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start++;
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}
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BB->removeSuccessor(BB->succ_begin());
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}
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}
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}
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// Actually remove the blocks now.
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for (unsigned i = 0, e = DeadBlocks.size(); i != e; ++i) {
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// Remove any call site information for calls in the block.
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for (auto &I : DeadBlocks[i]->instrs())
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if (I.isCall(MachineInstr::IgnoreBundle))
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DeadBlocks[i]->getParent()->updateCallSiteInfo(&I);
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DeadBlocks[i]->eraseFromParent();
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}
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// Cleanup PHI nodes.
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for (MachineFunction::iterator I = F.begin(), E = F.end(); I != E; ++I) {
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MachineBasicBlock *BB = &*I;
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// Prune unneeded PHI entries.
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SmallPtrSet<MachineBasicBlock*, 8> preds(BB->pred_begin(),
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BB->pred_end());
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MachineBasicBlock::iterator phi = BB->begin();
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while (phi != BB->end() && phi->isPHI()) {
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for (unsigned i = phi->getNumOperands() - 1; i >= 2; i-=2)
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if (!preds.count(phi->getOperand(i).getMBB())) {
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phi->RemoveOperand(i);
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phi->RemoveOperand(i-1);
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ModifiedPHI = true;
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}
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if (phi->getNumOperands() == 3) {
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const MachineOperand &Input = phi->getOperand(1);
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const MachineOperand &Output = phi->getOperand(0);
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Register InputReg = Input.getReg();
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Register OutputReg = Output.getReg();
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assert(Output.getSubReg() == 0 && "Cannot have output subregister");
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ModifiedPHI = true;
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if (InputReg != OutputReg) {
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MachineRegisterInfo &MRI = F.getRegInfo();
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unsigned InputSub = Input.getSubReg();
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if (InputSub == 0 &&
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MRI.constrainRegClass(InputReg, MRI.getRegClass(OutputReg)) &&
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!Input.isUndef()) {
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MRI.replaceRegWith(OutputReg, InputReg);
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} else {
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// The input register to the PHI has a subregister or it can't be
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// constrained to the proper register class or it is undef:
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// insert a COPY instead of simply replacing the output
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// with the input.
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const TargetInstrInfo *TII = F.getSubtarget().getInstrInfo();
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BuildMI(*BB, BB->getFirstNonPHI(), phi->getDebugLoc(),
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TII->get(TargetOpcode::COPY), OutputReg)
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.addReg(InputReg, getRegState(Input), InputSub);
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}
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phi++->eraseFromParent();
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}
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continue;
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}
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++phi;
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}
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}
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F.RenumberBlocks();
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return (!DeadBlocks.empty() || ModifiedPHI);
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}
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