llvm-project/llvm/test/CodeGen
Matthias Braun eec1f3672a LivePhysRegs: Fix addLiveOutsNoPristines() for return blocks past PEI
Re-commit r303938 and r303954 with a fix for addLiveIns(): the internal
addPristines() function must be called on an empty set or it may
accidentally reset saved registers.

- addLiveOutsNoPristines() needs to add callee saved registers that are
  actually saved and restored somewhere to the set (they are not
  pristine).
- Cleanup/rewrite the code for addLiveOuts()/addLiveOutsNoPristines().

This fixes the problem from D32156.

Differential Revision: https://reviews.llvm.org/D32464

llvm-svn: 304001
2017-05-26 16:23:08 +00:00
..
AArch64 CodeGen: Rename DEBUG_TYPE to match passnames 2017-05-25 21:26:32 +00:00
AMDGPU CodeGen: Rename DEBUG_TYPE to match passnames 2017-05-25 21:26:32 +00:00
ARM [ARM] Fix lowering of misaligned memcpy/memset 2017-05-26 13:59:12 +00:00
AVR [AVR] When lowering Select8/Select16, put newly generated MBBs in the same spot 2017-05-13 00:22:34 +00:00
BPF [bpf] fix a bug which causes incorrect big endian reloc fixup 2017-05-05 18:05:00 +00:00
Generic [LegacyPassManager] Remove TargetMachine constructors 2017-05-18 17:21:13 +00:00
Hexagon Add extra operand to CALLSEQ_START to keep frame part set up previously 2017-05-09 13:35:13 +00:00
Inputs
Lanai CodeGen: Rename DEBUG_TYPE to match passnames 2017-05-25 21:26:32 +00:00
MIR Move machine-cse-physreg.mir to test/CodeGen/Thumb 2017-05-24 17:20:47 +00:00
MSP430 [MSP430] Fix PR33050: Don't use ADD16ri to lower FrameIndex. 2017-05-24 15:08:30 +00:00
Mips [mips] Support micromips attribute passed by front-end 2017-05-22 12:47:41 +00:00
NVPTX Revert r302938 "Add LiveRangeShrink pass to shrink live range within BB." 2017-05-18 18:50:05 +00:00
PowerPC LivePhysRegs: Fix addLiveOutsNoPristines() for return blocks past PEI 2017-05-26 16:23:08 +00:00
SPARC Revert r302938 "Add LiveRangeShrink pass to shrink live range within BB." 2017-05-18 18:50:05 +00:00
SystemZ Elide stores which are overwritten without being observed. 2017-05-16 19:43:56 +00:00
Thumb Move machine-cse-physreg.mir to test/CodeGen/Thumb 2017-05-24 17:20:47 +00:00
Thumb2 Elide stores which are overwritten without being observed. 2017-05-16 19:43:56 +00:00
WebAssembly [WebAssembly] Fix WebAssemblyOptimizeReturned after r300367 2017-04-17 21:40:28 +00:00
WinEH
X86 [DAGCombiner] use narrow vector ops to eliminate concat/extract (PR32790) 2017-05-26 15:33:18 +00:00
XCore AsmPrinter: mark the beginning and the end of a function in verbose mode 2017-05-23 21:22:16 +00:00