forked from OSchip/llvm-project
100 lines
2.8 KiB
LLVM
100 lines
2.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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target datalayout = "n8:16:32:64"
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; Eliminating the casts in this testcase (by narrowing the AND operation)
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; allows instcombine to realize the function always returns false.
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define i1 @test1(i32 %A, i32 %B) {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: ret i1 false
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;
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%C1 = icmp slt i32 %A, %B
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%ELIM1 = zext i1 %C1 to i32
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%C2 = icmp sgt i32 %A, %B
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%ELIM2 = zext i1 %C2 to i32
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%C3 = and i32 %ELIM1, %ELIM2
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%ELIM3 = trunc i32 %C3 to i1
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ret i1 %ELIM3
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}
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; The next 6 (3 logic ops * (scalar+vector)) tests show potential cases for narrowing a bitwise logic op.
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define i32 @shrink_xor(i64 %a) {
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; CHECK-LABEL: @shrink_xor(
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; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 %a to i32
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; CHECK-NEXT: [[TRUNC:%.*]] = xor i32 [[TMP1]], 1
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; CHECK-NEXT: ret i32 [[TRUNC]]
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;
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%xor = xor i64 %a, 1
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%trunc = trunc i64 %xor to i32
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ret i32 %trunc
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}
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; Vectors (with splat constants) should get the same transform.
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define <2 x i32> @shrink_xor_vec(<2 x i64> %a) {
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; CHECK-LABEL: @shrink_xor_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i64> %a to <2 x i32>
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; CHECK-NEXT: [[TRUNC:%.*]] = xor <2 x i32> [[TMP1]], <i32 2, i32 2>
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; CHECK-NEXT: ret <2 x i32> [[TRUNC]]
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;
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%xor = xor <2 x i64> %a, <i64 2, i64 2>
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%trunc = trunc <2 x i64> %xor to <2 x i32>
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ret <2 x i32> %trunc
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}
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; Source and dest types are not in the datalayout.
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define i3 @shrink_or(i6 %a) {
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; CHECK-LABEL: @shrink_or(
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; CHECK-NEXT: [[TMP1:%.*]] = trunc i6 %a to i3
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; CHECK-NEXT: [[TRUNC:%.*]] = or i3 [[TMP1]], 1
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; CHECK-NEXT: ret i3 [[TRUNC]]
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;
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%or = or i6 %a, 33
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%trunc = trunc i6 %or to i3
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ret i3 %trunc
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}
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; Vectors (with non-splat constants) should get the same transform.
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define <2 x i8> @shrink_or_vec(<2 x i16> %a) {
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; CHECK-LABEL: @shrink_or_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i16> %a to <2 x i8>
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; CHECK-NEXT: [[TRUNC:%.*]] = or <2 x i8> [[TMP1]], <i8 -1, i8 0>
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; CHECK-NEXT: ret <2 x i8> [[TRUNC]]
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;
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%or = or <2 x i16> %a, <i16 -1, i16 256>
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%trunc = trunc <2 x i16> %or to <2 x i8>
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ret <2 x i8> %trunc
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}
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; We discriminate against weird types.
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define i31 @shrink_and(i64 %a) {
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; CHECK-LABEL: @shrink_and(
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; CHECK-NEXT: [[AND:%.*]] = and i64 %a, 42
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; CHECK-NEXT: [[TRUNC:%.*]] = trunc i64 [[AND]] to i31
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; CHECK-NEXT: ret i31 [[TRUNC]]
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;
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%and = and i64 %a, 42
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%trunc = trunc i64 %and to i31
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ret i31 %trunc
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}
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; Chop the top of the constant(s) if needed.
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define <2 x i32> @shrink_and_vec(<2 x i33> %a) {
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; CHECK-LABEL: @shrink_and_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i33> %a to <2 x i32>
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; CHECK-NEXT: [[TRUNC:%.*]] = and <2 x i32> [[TMP1]], <i32 0, i32 6>
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; CHECK-NEXT: ret <2 x i32> [[TRUNC]]
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;
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%and = and <2 x i33> %a, <i33 4294967296, i33 6>
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%trunc = trunc <2 x i33> %and to <2 x i32>
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ret <2 x i32> %trunc
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}
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