llvm-project/llvm/test/CodeGen/MIR/AArch64
Matthias Braun 1eb473680a MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
Rename AllVRegsAllocated to NoVRegs. This avoids the connotation of
running after register and simply describes that no vregs are used in
a machine function. With that we can simply compute the property and do
not need to dump/parse it in .mir files.

Differential Revision: http://reviews.llvm.org/D23850

llvm-svn: 279698
2016-08-25 01:27:13 +00:00
..
cfi-def-cfa.mir MIRParser: Use shorter cfi identifiers 2016-07-26 18:20:00 +00:00
expected-target-flag-name.mir llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00
generic-virtual-registers-error.mir MIRParser/MIRPrinter: Compute isSSA instead of printing/parsing it. 2016-08-24 01:32:41 +00:00
generic-virtual-registers-with-regbank-error.mir MIRParser/MIRPrinter: Compute isSSA instead of printing/parsing it. 2016-08-24 01:32:41 +00:00
inst-size-tlsdesc-callseq.mir MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it 2016-08-25 01:27:13 +00:00
intrinsics.mir CodeGen: add new "intrinsic" MachineOperand kind. 2016-07-29 20:32:59 +00:00
invalid-target-flag-name.mir llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00
lit.local.cfg
machine-dead-copy.mir MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it 2016-08-25 01:27:13 +00:00
machine-scheduler.mir MIRParser/MIRPrinter: Compute isSSA instead of printing/parsing it. 2016-08-24 01:32:41 +00:00
multiple-lhs-operands.mir llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00
stack-object-local-offset.mir MIRParser/MIRPrinter: Compute isSSA instead of printing/parsing it. 2016-08-24 01:32:41 +00:00
target-flags.mir llc: Add support for -run-pass none 2016-07-16 02:24:59 +00:00