forked from OSchip/llvm-project
956 lines
32 KiB
C++
956 lines
32 KiB
C++
//===- IntrinsicEmitter.cpp - Generate intrinsic information --------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This tablegen backend emits information about intrinsic functions.
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//
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//===----------------------------------------------------------------------===//
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#include "CodeGenIntrinsics.h"
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#include "CodeGenTarget.h"
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#include "SequenceToOffsetTable.h"
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#include "TableGenBackends.h"
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/TableGen/Error.h"
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#include "llvm/TableGen/Record.h"
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#include "llvm/TableGen/StringMatcher.h"
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#include "llvm/TableGen/StringToOffsetTable.h"
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#include "llvm/TableGen/TableGenBackend.h"
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#include <algorithm>
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using namespace llvm;
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cl::OptionCategory GenIntrinsicCat("Options for -gen-intrinsic-enums");
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cl::opt<std::string>
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IntrinsicPrefix("intrinsic-prefix",
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cl::desc("Generate intrinsics with this target prefix"),
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cl::value_desc("target prefix"), cl::cat(GenIntrinsicCat));
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namespace {
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class IntrinsicEmitter {
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RecordKeeper &Records;
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public:
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IntrinsicEmitter(RecordKeeper &R) : Records(R) {}
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void run(raw_ostream &OS, bool Enums);
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void EmitEnumInfo(const CodeGenIntrinsicTable &Ints, raw_ostream &OS);
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void EmitTargetInfo(const CodeGenIntrinsicTable &Ints, raw_ostream &OS);
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void EmitIntrinsicToNameTable(const CodeGenIntrinsicTable &Ints,
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raw_ostream &OS);
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void EmitIntrinsicToOverloadTable(const CodeGenIntrinsicTable &Ints,
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raw_ostream &OS);
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void EmitGenerator(const CodeGenIntrinsicTable &Ints, raw_ostream &OS);
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void EmitAttributes(const CodeGenIntrinsicTable &Ints, raw_ostream &OS);
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void EmitIntrinsicToBuiltinMap(const CodeGenIntrinsicTable &Ints, bool IsGCC,
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raw_ostream &OS);
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};
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} // End anonymous namespace
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//===----------------------------------------------------------------------===//
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// IntrinsicEmitter Implementation
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//===----------------------------------------------------------------------===//
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void IntrinsicEmitter::run(raw_ostream &OS, bool Enums) {
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emitSourceFileHeader("Intrinsic Function Source Fragment", OS);
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CodeGenIntrinsicTable Ints(Records);
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if (Enums) {
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// Emit the enum information.
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EmitEnumInfo(Ints, OS);
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} else {
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// Emit the target metadata.
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EmitTargetInfo(Ints, OS);
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// Emit the intrinsic ID -> name table.
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EmitIntrinsicToNameTable(Ints, OS);
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// Emit the intrinsic ID -> overload table.
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EmitIntrinsicToOverloadTable(Ints, OS);
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// Emit the intrinsic declaration generator.
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EmitGenerator(Ints, OS);
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// Emit the intrinsic parameter attributes.
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EmitAttributes(Ints, OS);
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// Emit code to translate GCC builtins into LLVM intrinsics.
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EmitIntrinsicToBuiltinMap(Ints, true, OS);
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// Emit code to translate MS builtins into LLVM intrinsics.
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EmitIntrinsicToBuiltinMap(Ints, false, OS);
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}
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}
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void IntrinsicEmitter::EmitEnumInfo(const CodeGenIntrinsicTable &Ints,
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raw_ostream &OS) {
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// Find the TargetSet for which to generate enums. There will be an initial
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// set with an empty target prefix which will include target independent
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// intrinsics like dbg.value.
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const CodeGenIntrinsicTable::TargetSet *Set = nullptr;
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for (const auto &Target : Ints.Targets) {
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if (Target.Name == IntrinsicPrefix) {
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Set = &Target;
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break;
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}
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}
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if (!Set) {
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std::vector<std::string> KnownTargets;
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for (const auto &Target : Ints.Targets)
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if (!Target.Name.empty())
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KnownTargets.push_back(Target.Name);
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PrintFatalError("tried to generate intrinsics for unknown target " +
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IntrinsicPrefix +
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"\nKnown targets are: " + join(KnownTargets, ", ") + "\n");
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}
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// Generate a complete header for target specific intrinsics.
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if (!IntrinsicPrefix.empty()) {
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std::string UpperPrefix = StringRef(IntrinsicPrefix).upper();
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OS << "#ifndef LLVM_IR_INTRINSIC_" << UpperPrefix << "_ENUMS_H\n";
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OS << "#define LLVM_IR_INTRINSIC_" << UpperPrefix << "_ENUMS_H\n\n";
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OS << "namespace llvm {\n";
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OS << "namespace Intrinsic {\n";
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OS << "enum " << UpperPrefix << "Intrinsics : unsigned {\n";
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}
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OS << "// Enum values for intrinsics\n";
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for (unsigned i = Set->Offset, e = Set->Offset + Set->Count; i != e; ++i) {
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OS << " " << Ints[i].EnumName;
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// Assign a value to the first intrinsic in this target set so that all
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// intrinsic ids are distinct.
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if (i == Set->Offset)
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OS << " = " << (Set->Offset + 1);
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OS << ", ";
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if (Ints[i].EnumName.size() < 40)
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OS.indent(40 - Ints[i].EnumName.size());
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OS << " // " << Ints[i].Name << "\n";
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}
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// Emit num_intrinsics into the target neutral enum.
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if (IntrinsicPrefix.empty()) {
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OS << " num_intrinsics = " << (Ints.size() + 1) << "\n";
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} else {
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OS << "}; // enum\n";
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OS << "} // namespace Intrinsic\n";
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OS << "} // namespace llvm\n\n";
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OS << "#endif\n";
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}
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}
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void IntrinsicEmitter::EmitTargetInfo(const CodeGenIntrinsicTable &Ints,
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raw_ostream &OS) {
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OS << "// Target mapping\n";
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OS << "#ifdef GET_INTRINSIC_TARGET_DATA\n";
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OS << "struct IntrinsicTargetInfo {\n"
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<< " llvm::StringLiteral Name;\n"
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<< " size_t Offset;\n"
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<< " size_t Count;\n"
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<< "};\n";
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OS << "static constexpr IntrinsicTargetInfo TargetInfos[] = {\n";
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for (auto Target : Ints.Targets)
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OS << " {llvm::StringLiteral(\"" << Target.Name << "\"), " << Target.Offset
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<< ", " << Target.Count << "},\n";
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OS << "};\n";
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OS << "#endif\n\n";
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}
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void IntrinsicEmitter::EmitIntrinsicToNameTable(
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const CodeGenIntrinsicTable &Ints, raw_ostream &OS) {
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OS << "// Intrinsic ID to name table\n";
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OS << "#ifdef GET_INTRINSIC_NAME_TABLE\n";
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OS << " // Note that entry #0 is the invalid intrinsic!\n";
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for (unsigned i = 0, e = Ints.size(); i != e; ++i)
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OS << " \"" << Ints[i].Name << "\",\n";
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OS << "#endif\n\n";
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}
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void IntrinsicEmitter::EmitIntrinsicToOverloadTable(
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const CodeGenIntrinsicTable &Ints, raw_ostream &OS) {
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OS << "// Intrinsic ID to overload bitset\n";
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OS << "#ifdef GET_INTRINSIC_OVERLOAD_TABLE\n";
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OS << "static const uint8_t OTable[] = {\n";
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OS << " 0";
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for (unsigned i = 0, e = Ints.size(); i != e; ++i) {
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// Add one to the index so we emit a null bit for the invalid #0 intrinsic.
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if ((i+1)%8 == 0)
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OS << ",\n 0";
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if (Ints[i].isOverloaded)
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OS << " | (1<<" << (i+1)%8 << ')';
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}
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OS << "\n};\n\n";
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// OTable contains a true bit at the position if the intrinsic is overloaded.
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OS << "return (OTable[id/8] & (1 << (id%8))) != 0;\n";
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OS << "#endif\n\n";
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}
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// NOTE: This must be kept in synch with the copy in lib/IR/Function.cpp!
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enum IIT_Info {
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// Common values should be encoded with 0-15.
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IIT_Done = 0,
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IIT_I1 = 1,
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IIT_I8 = 2,
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IIT_I16 = 3,
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IIT_I32 = 4,
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IIT_I64 = 5,
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IIT_F16 = 6,
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IIT_F32 = 7,
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IIT_F64 = 8,
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IIT_V2 = 9,
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IIT_V4 = 10,
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IIT_V8 = 11,
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IIT_V16 = 12,
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IIT_V32 = 13,
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IIT_PTR = 14,
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IIT_ARG = 15,
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// Values from 16+ are only encodable with the inefficient encoding.
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IIT_V64 = 16,
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IIT_MMX = 17,
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IIT_TOKEN = 18,
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IIT_METADATA = 19,
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IIT_EMPTYSTRUCT = 20,
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IIT_STRUCT2 = 21,
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IIT_STRUCT3 = 22,
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IIT_STRUCT4 = 23,
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IIT_STRUCT5 = 24,
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IIT_EXTEND_ARG = 25,
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IIT_TRUNC_ARG = 26,
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IIT_ANYPTR = 27,
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IIT_V1 = 28,
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IIT_VARARG = 29,
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IIT_HALF_VEC_ARG = 30,
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IIT_SAME_VEC_WIDTH_ARG = 31,
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IIT_PTR_TO_ARG = 32,
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IIT_PTR_TO_ELT = 33,
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IIT_VEC_OF_ANYPTRS_TO_ELT = 34,
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IIT_I128 = 35,
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IIT_V512 = 36,
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IIT_V1024 = 37,
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IIT_STRUCT6 = 38,
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IIT_STRUCT7 = 39,
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IIT_STRUCT8 = 40,
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IIT_F128 = 41,
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IIT_VEC_ELEMENT = 42,
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IIT_SCALABLE_VEC = 43,
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IIT_SUBDIVIDE2_ARG = 44,
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IIT_SUBDIVIDE4_ARG = 45,
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IIT_VEC_OF_BITCASTS_TO_INT = 46,
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IIT_V128 = 47
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};
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static void EncodeFixedValueType(MVT::SimpleValueType VT,
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std::vector<unsigned char> &Sig) {
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if (MVT(VT).isInteger()) {
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unsigned BitWidth = MVT(VT).getSizeInBits();
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switch (BitWidth) {
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default: PrintFatalError("unhandled integer type width in intrinsic!");
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case 1: return Sig.push_back(IIT_I1);
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case 8: return Sig.push_back(IIT_I8);
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case 16: return Sig.push_back(IIT_I16);
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case 32: return Sig.push_back(IIT_I32);
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case 64: return Sig.push_back(IIT_I64);
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case 128: return Sig.push_back(IIT_I128);
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}
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}
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switch (VT) {
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default: PrintFatalError("unhandled MVT in intrinsic!");
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case MVT::f16: return Sig.push_back(IIT_F16);
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case MVT::f32: return Sig.push_back(IIT_F32);
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case MVT::f64: return Sig.push_back(IIT_F64);
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case MVT::f128: return Sig.push_back(IIT_F128);
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case MVT::token: return Sig.push_back(IIT_TOKEN);
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case MVT::Metadata: return Sig.push_back(IIT_METADATA);
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case MVT::x86mmx: return Sig.push_back(IIT_MMX);
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// MVT::OtherVT is used to mean the empty struct type here.
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case MVT::Other: return Sig.push_back(IIT_EMPTYSTRUCT);
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// MVT::isVoid is used to represent varargs here.
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case MVT::isVoid: return Sig.push_back(IIT_VARARG);
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}
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}
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#if defined(_MSC_VER) && !defined(__clang__)
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#pragma optimize("",off) // MSVC 2015 optimizer can't deal with this function.
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#endif
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static void EncodeFixedType(Record *R, std::vector<unsigned char> &ArgCodes,
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unsigned &NextArgCode,
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std::vector<unsigned char> &Sig,
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ArrayRef<unsigned char> Mapping) {
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if (R->isSubClassOf("LLVMMatchType")) {
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unsigned Number = Mapping[R->getValueAsInt("Number")];
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assert(Number < ArgCodes.size() && "Invalid matching number!");
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if (R->isSubClassOf("LLVMExtendedType"))
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Sig.push_back(IIT_EXTEND_ARG);
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else if (R->isSubClassOf("LLVMTruncatedType"))
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Sig.push_back(IIT_TRUNC_ARG);
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else if (R->isSubClassOf("LLVMHalfElementsVectorType"))
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Sig.push_back(IIT_HALF_VEC_ARG);
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else if (R->isSubClassOf("LLVMScalarOrSameVectorWidth")) {
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Sig.push_back(IIT_SAME_VEC_WIDTH_ARG);
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Sig.push_back((Number << 3) | ArgCodes[Number]);
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MVT::SimpleValueType VT = getValueType(R->getValueAsDef("ElTy"));
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EncodeFixedValueType(VT, Sig);
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return;
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}
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else if (R->isSubClassOf("LLVMPointerTo"))
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Sig.push_back(IIT_PTR_TO_ARG);
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else if (R->isSubClassOf("LLVMVectorOfAnyPointersToElt")) {
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Sig.push_back(IIT_VEC_OF_ANYPTRS_TO_ELT);
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// Encode overloaded ArgNo
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Sig.push_back(NextArgCode++);
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// Encode LLVMMatchType<Number> ArgNo
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Sig.push_back(Number);
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return;
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} else if (R->isSubClassOf("LLVMPointerToElt"))
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Sig.push_back(IIT_PTR_TO_ELT);
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else if (R->isSubClassOf("LLVMVectorElementType"))
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Sig.push_back(IIT_VEC_ELEMENT);
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else if (R->isSubClassOf("LLVMSubdivide2VectorType"))
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Sig.push_back(IIT_SUBDIVIDE2_ARG);
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else if (R->isSubClassOf("LLVMSubdivide4VectorType"))
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Sig.push_back(IIT_SUBDIVIDE4_ARG);
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else if (R->isSubClassOf("LLVMVectorOfBitcastsToInt"))
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Sig.push_back(IIT_VEC_OF_BITCASTS_TO_INT);
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else
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Sig.push_back(IIT_ARG);
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return Sig.push_back((Number << 3) | 7 /*IITDescriptor::AK_MatchType*/);
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}
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MVT::SimpleValueType VT = getValueType(R->getValueAsDef("VT"));
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unsigned Tmp = 0;
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switch (VT) {
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default: break;
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case MVT::iPTRAny: ++Tmp; LLVM_FALLTHROUGH;
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case MVT::vAny: ++Tmp; LLVM_FALLTHROUGH;
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case MVT::fAny: ++Tmp; LLVM_FALLTHROUGH;
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case MVT::iAny: ++Tmp; LLVM_FALLTHROUGH;
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case MVT::Any: {
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// If this is an "any" valuetype, then the type is the type of the next
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// type in the list specified to getIntrinsic().
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Sig.push_back(IIT_ARG);
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// Figure out what arg # this is consuming, and remember what kind it was.
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assert(NextArgCode < ArgCodes.size() && ArgCodes[NextArgCode] == Tmp &&
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"Invalid or no ArgCode associated with overloaded VT!");
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unsigned ArgNo = NextArgCode++;
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// Encode what sort of argument it must be in the low 3 bits of the ArgNo.
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return Sig.push_back((ArgNo << 3) | Tmp);
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}
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case MVT::iPTR: {
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unsigned AddrSpace = 0;
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if (R->isSubClassOf("LLVMQualPointerType")) {
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AddrSpace = R->getValueAsInt("AddrSpace");
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assert(AddrSpace < 256 && "Address space exceeds 255");
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}
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if (AddrSpace) {
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Sig.push_back(IIT_ANYPTR);
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Sig.push_back(AddrSpace);
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} else {
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Sig.push_back(IIT_PTR);
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}
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return EncodeFixedType(R->getValueAsDef("ElTy"), ArgCodes, NextArgCode, Sig,
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Mapping);
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}
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}
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if (MVT(VT).isVector()) {
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MVT VVT = VT;
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if (VVT.isScalableVector())
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Sig.push_back(IIT_SCALABLE_VEC);
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switch (VVT.getVectorNumElements()) {
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default: PrintFatalError("unhandled vector type width in intrinsic!");
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case 1: Sig.push_back(IIT_V1); break;
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case 2: Sig.push_back(IIT_V2); break;
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case 4: Sig.push_back(IIT_V4); break;
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case 8: Sig.push_back(IIT_V8); break;
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case 16: Sig.push_back(IIT_V16); break;
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case 32: Sig.push_back(IIT_V32); break;
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case 64: Sig.push_back(IIT_V64); break;
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case 128: Sig.push_back(IIT_V128); break;
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case 512: Sig.push_back(IIT_V512); break;
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case 1024: Sig.push_back(IIT_V1024); break;
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}
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return EncodeFixedValueType(VVT.getVectorElementType().SimpleTy, Sig);
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}
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EncodeFixedValueType(VT, Sig);
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}
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static void UpdateArgCodes(Record *R, std::vector<unsigned char> &ArgCodes,
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unsigned int &NumInserted,
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SmallVectorImpl<unsigned char> &Mapping) {
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if (R->isSubClassOf("LLVMMatchType")) {
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if (R->isSubClassOf("LLVMVectorOfAnyPointersToElt")) {
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ArgCodes.push_back(3 /*vAny*/);
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++NumInserted;
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}
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return;
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}
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unsigned Tmp = 0;
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switch (getValueType(R->getValueAsDef("VT"))) {
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default: break;
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case MVT::iPTR:
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UpdateArgCodes(R->getValueAsDef("ElTy"), ArgCodes, NumInserted, Mapping);
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break;
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case MVT::iPTRAny:
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++Tmp;
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LLVM_FALLTHROUGH;
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case MVT::vAny:
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++Tmp;
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LLVM_FALLTHROUGH;
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case MVT::fAny:
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++Tmp;
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LLVM_FALLTHROUGH;
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case MVT::iAny:
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++Tmp;
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LLVM_FALLTHROUGH;
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case MVT::Any:
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unsigned OriginalIdx = ArgCodes.size() - NumInserted;
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assert(OriginalIdx >= Mapping.size());
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Mapping.resize(OriginalIdx+1);
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Mapping[OriginalIdx] = ArgCodes.size();
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ArgCodes.push_back(Tmp);
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break;
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}
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}
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#if defined(_MSC_VER) && !defined(__clang__)
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#pragma optimize("",on)
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#endif
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/// ComputeFixedEncoding - If we can encode the type signature for this
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/// intrinsic into 32 bits, return it. If not, return ~0U.
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static void ComputeFixedEncoding(const CodeGenIntrinsic &Int,
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std::vector<unsigned char> &TypeSig) {
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std::vector<unsigned char> ArgCodes;
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// Add codes for any overloaded result VTs.
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unsigned int NumInserted = 0;
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SmallVector<unsigned char, 8> ArgMapping;
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for (unsigned i = 0, e = Int.IS.RetVTs.size(); i != e; ++i)
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UpdateArgCodes(Int.IS.RetTypeDefs[i], ArgCodes, NumInserted, ArgMapping);
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// Add codes for any overloaded operand VTs.
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for (unsigned i = 0, e = Int.IS.ParamTypeDefs.size(); i != e; ++i)
|
|
UpdateArgCodes(Int.IS.ParamTypeDefs[i], ArgCodes, NumInserted, ArgMapping);
|
|
|
|
unsigned NextArgCode = 0;
|
|
if (Int.IS.RetVTs.empty())
|
|
TypeSig.push_back(IIT_Done);
|
|
else if (Int.IS.RetVTs.size() == 1 &&
|
|
Int.IS.RetVTs[0] == MVT::isVoid)
|
|
TypeSig.push_back(IIT_Done);
|
|
else {
|
|
switch (Int.IS.RetVTs.size()) {
|
|
case 1: break;
|
|
case 2: TypeSig.push_back(IIT_STRUCT2); break;
|
|
case 3: TypeSig.push_back(IIT_STRUCT3); break;
|
|
case 4: TypeSig.push_back(IIT_STRUCT4); break;
|
|
case 5: TypeSig.push_back(IIT_STRUCT5); break;
|
|
case 6: TypeSig.push_back(IIT_STRUCT6); break;
|
|
case 7: TypeSig.push_back(IIT_STRUCT7); break;
|
|
case 8: TypeSig.push_back(IIT_STRUCT8); break;
|
|
default: llvm_unreachable("Unhandled case in struct");
|
|
}
|
|
|
|
for (unsigned i = 0, e = Int.IS.RetVTs.size(); i != e; ++i)
|
|
EncodeFixedType(Int.IS.RetTypeDefs[i], ArgCodes, NextArgCode, TypeSig,
|
|
ArgMapping);
|
|
}
|
|
|
|
for (unsigned i = 0, e = Int.IS.ParamTypeDefs.size(); i != e; ++i)
|
|
EncodeFixedType(Int.IS.ParamTypeDefs[i], ArgCodes, NextArgCode, TypeSig,
|
|
ArgMapping);
|
|
}
|
|
|
|
static void printIITEntry(raw_ostream &OS, unsigned char X) {
|
|
OS << (unsigned)X;
|
|
}
|
|
|
|
void IntrinsicEmitter::EmitGenerator(const CodeGenIntrinsicTable &Ints,
|
|
raw_ostream &OS) {
|
|
// If we can compute a 32-bit fixed encoding for this intrinsic, do so and
|
|
// capture it in this vector, otherwise store a ~0U.
|
|
std::vector<unsigned> FixedEncodings;
|
|
|
|
SequenceToOffsetTable<std::vector<unsigned char> > LongEncodingTable;
|
|
|
|
std::vector<unsigned char> TypeSig;
|
|
|
|
// Compute the unique argument type info.
|
|
for (unsigned i = 0, e = Ints.size(); i != e; ++i) {
|
|
// Get the signature for the intrinsic.
|
|
TypeSig.clear();
|
|
ComputeFixedEncoding(Ints[i], TypeSig);
|
|
|
|
// Check to see if we can encode it into a 32-bit word. We can only encode
|
|
// 8 nibbles into a 32-bit word.
|
|
if (TypeSig.size() <= 8) {
|
|
bool Failed = false;
|
|
unsigned Result = 0;
|
|
for (unsigned i = 0, e = TypeSig.size(); i != e; ++i) {
|
|
// If we had an unencodable argument, bail out.
|
|
if (TypeSig[i] > 15) {
|
|
Failed = true;
|
|
break;
|
|
}
|
|
Result = (Result << 4) | TypeSig[e-i-1];
|
|
}
|
|
|
|
// If this could be encoded into a 31-bit word, return it.
|
|
if (!Failed && (Result >> 31) == 0) {
|
|
FixedEncodings.push_back(Result);
|
|
continue;
|
|
}
|
|
}
|
|
|
|
// Otherwise, we're going to unique the sequence into the
|
|
// LongEncodingTable, and use its offset in the 32-bit table instead.
|
|
LongEncodingTable.add(TypeSig);
|
|
|
|
// This is a placehold that we'll replace after the table is laid out.
|
|
FixedEncodings.push_back(~0U);
|
|
}
|
|
|
|
LongEncodingTable.layout();
|
|
|
|
OS << "// Global intrinsic function declaration type table.\n";
|
|
OS << "#ifdef GET_INTRINSIC_GENERATOR_GLOBAL\n";
|
|
|
|
OS << "static const unsigned IIT_Table[] = {\n ";
|
|
|
|
for (unsigned i = 0, e = FixedEncodings.size(); i != e; ++i) {
|
|
if ((i & 7) == 7)
|
|
OS << "\n ";
|
|
|
|
// If the entry fit in the table, just emit it.
|
|
if (FixedEncodings[i] != ~0U) {
|
|
OS << "0x" << Twine::utohexstr(FixedEncodings[i]) << ", ";
|
|
continue;
|
|
}
|
|
|
|
TypeSig.clear();
|
|
ComputeFixedEncoding(Ints[i], TypeSig);
|
|
|
|
|
|
// Otherwise, emit the offset into the long encoding table. We emit it this
|
|
// way so that it is easier to read the offset in the .def file.
|
|
OS << "(1U<<31) | " << LongEncodingTable.get(TypeSig) << ", ";
|
|
}
|
|
|
|
OS << "0\n};\n\n";
|
|
|
|
// Emit the shared table of register lists.
|
|
OS << "static const unsigned char IIT_LongEncodingTable[] = {\n";
|
|
if (!LongEncodingTable.empty())
|
|
LongEncodingTable.emit(OS, printIITEntry);
|
|
OS << " 255\n};\n\n";
|
|
|
|
OS << "#endif\n\n"; // End of GET_INTRINSIC_GENERATOR_GLOBAL
|
|
}
|
|
|
|
namespace {
|
|
struct AttributeComparator {
|
|
bool operator()(const CodeGenIntrinsic *L, const CodeGenIntrinsic *R) const {
|
|
// Sort throwing intrinsics after non-throwing intrinsics.
|
|
if (L->canThrow != R->canThrow)
|
|
return R->canThrow;
|
|
|
|
if (L->isNoDuplicate != R->isNoDuplicate)
|
|
return R->isNoDuplicate;
|
|
|
|
if (L->isNoReturn != R->isNoReturn)
|
|
return R->isNoReturn;
|
|
|
|
if (L->isWillReturn != R->isWillReturn)
|
|
return R->isWillReturn;
|
|
|
|
if (L->isCold != R->isCold)
|
|
return R->isCold;
|
|
|
|
if (L->isConvergent != R->isConvergent)
|
|
return R->isConvergent;
|
|
|
|
if (L->isSpeculatable != R->isSpeculatable)
|
|
return R->isSpeculatable;
|
|
|
|
if (L->hasSideEffects != R->hasSideEffects)
|
|
return R->hasSideEffects;
|
|
|
|
// Try to order by readonly/readnone attribute.
|
|
CodeGenIntrinsic::ModRefBehavior LK = L->ModRef;
|
|
CodeGenIntrinsic::ModRefBehavior RK = R->ModRef;
|
|
if (LK != RK) return (LK > RK);
|
|
// Order by argument attributes.
|
|
// This is reliable because each side is already sorted internally.
|
|
return (L->ArgumentAttributes < R->ArgumentAttributes);
|
|
}
|
|
};
|
|
} // End anonymous namespace
|
|
|
|
/// EmitAttributes - This emits the Intrinsic::getAttributes method.
|
|
void IntrinsicEmitter::EmitAttributes(const CodeGenIntrinsicTable &Ints,
|
|
raw_ostream &OS) {
|
|
OS << "// Add parameter attributes that are not common to all intrinsics.\n";
|
|
OS << "#ifdef GET_INTRINSIC_ATTRIBUTES\n";
|
|
OS << "AttributeList Intrinsic::getAttributes(LLVMContext &C, ID id) {\n";
|
|
|
|
// Compute the maximum number of attribute arguments and the map
|
|
typedef std::map<const CodeGenIntrinsic*, unsigned,
|
|
AttributeComparator> UniqAttrMapTy;
|
|
UniqAttrMapTy UniqAttributes;
|
|
unsigned maxArgAttrs = 0;
|
|
unsigned AttrNum = 0;
|
|
for (unsigned i = 0, e = Ints.size(); i != e; ++i) {
|
|
const CodeGenIntrinsic &intrinsic = Ints[i];
|
|
maxArgAttrs =
|
|
std::max(maxArgAttrs, unsigned(intrinsic.ArgumentAttributes.size()));
|
|
unsigned &N = UniqAttributes[&intrinsic];
|
|
if (N) continue;
|
|
assert(AttrNum < 256 && "Too many unique attributes for table!");
|
|
N = ++AttrNum;
|
|
}
|
|
|
|
// Emit an array of AttributeList. Most intrinsics will have at least one
|
|
// entry, for the function itself (index ~1), which is usually nounwind.
|
|
OS << " static const uint8_t IntrinsicsToAttributesMap[] = {\n";
|
|
|
|
for (unsigned i = 0, e = Ints.size(); i != e; ++i) {
|
|
const CodeGenIntrinsic &intrinsic = Ints[i];
|
|
|
|
OS << " " << UniqAttributes[&intrinsic] << ", // "
|
|
<< intrinsic.Name << "\n";
|
|
}
|
|
OS << " };\n\n";
|
|
|
|
OS << " AttributeList AS[" << maxArgAttrs + 1 << "];\n";
|
|
OS << " unsigned NumAttrs = 0;\n";
|
|
OS << " if (id != 0) {\n";
|
|
OS << " switch(IntrinsicsToAttributesMap[id - 1]) {\n";
|
|
OS << " default: llvm_unreachable(\"Invalid attribute number\");\n";
|
|
for (UniqAttrMapTy::const_iterator I = UniqAttributes.begin(),
|
|
E = UniqAttributes.end(); I != E; ++I) {
|
|
OS << " case " << I->second << ": {\n";
|
|
|
|
const CodeGenIntrinsic &intrinsic = *(I->first);
|
|
|
|
// Keep track of the number of attributes we're writing out.
|
|
unsigned numAttrs = 0;
|
|
|
|
// The argument attributes are alreadys sorted by argument index.
|
|
unsigned ai = 0, ae = intrinsic.ArgumentAttributes.size();
|
|
if (ae) {
|
|
while (ai != ae) {
|
|
unsigned argNo = intrinsic.ArgumentAttributes[ai].first;
|
|
unsigned attrIdx = argNo + 1; // Must match AttributeList::FirstArgIndex
|
|
|
|
OS << " const Attribute::AttrKind AttrParam" << attrIdx << "[]= {";
|
|
bool addComma = false;
|
|
|
|
do {
|
|
switch (intrinsic.ArgumentAttributes[ai].second) {
|
|
case CodeGenIntrinsic::NoCapture:
|
|
if (addComma)
|
|
OS << ",";
|
|
OS << "Attribute::NoCapture";
|
|
addComma = true;
|
|
break;
|
|
case CodeGenIntrinsic::NoAlias:
|
|
if (addComma)
|
|
OS << ",";
|
|
OS << "Attribute::NoAlias";
|
|
addComma = true;
|
|
break;
|
|
case CodeGenIntrinsic::Returned:
|
|
if (addComma)
|
|
OS << ",";
|
|
OS << "Attribute::Returned";
|
|
addComma = true;
|
|
break;
|
|
case CodeGenIntrinsic::ReadOnly:
|
|
if (addComma)
|
|
OS << ",";
|
|
OS << "Attribute::ReadOnly";
|
|
addComma = true;
|
|
break;
|
|
case CodeGenIntrinsic::WriteOnly:
|
|
if (addComma)
|
|
OS << ",";
|
|
OS << "Attribute::WriteOnly";
|
|
addComma = true;
|
|
break;
|
|
case CodeGenIntrinsic::ReadNone:
|
|
if (addComma)
|
|
OS << ",";
|
|
OS << "Attribute::ReadNone";
|
|
addComma = true;
|
|
break;
|
|
case CodeGenIntrinsic::ImmArg:
|
|
if (addComma)
|
|
OS << ',';
|
|
OS << "Attribute::ImmArg";
|
|
addComma = true;
|
|
break;
|
|
}
|
|
|
|
++ai;
|
|
} while (ai != ae && intrinsic.ArgumentAttributes[ai].first == argNo);
|
|
OS << "};\n";
|
|
OS << " AS[" << numAttrs++ << "] = AttributeList::get(C, "
|
|
<< attrIdx << ", AttrParam" << attrIdx << ");\n";
|
|
}
|
|
}
|
|
|
|
if (!intrinsic.canThrow ||
|
|
(intrinsic.ModRef != CodeGenIntrinsic::ReadWriteMem && !intrinsic.hasSideEffects) ||
|
|
intrinsic.isNoReturn || intrinsic.isWillReturn || intrinsic.isCold ||
|
|
intrinsic.isNoDuplicate || intrinsic.isConvergent ||
|
|
intrinsic.isSpeculatable) {
|
|
OS << " const Attribute::AttrKind Atts[] = {";
|
|
bool addComma = false;
|
|
if (!intrinsic.canThrow) {
|
|
OS << "Attribute::NoUnwind";
|
|
addComma = true;
|
|
}
|
|
if (intrinsic.isNoReturn) {
|
|
if (addComma)
|
|
OS << ",";
|
|
OS << "Attribute::NoReturn";
|
|
addComma = true;
|
|
}
|
|
if (intrinsic.isWillReturn) {
|
|
if (addComma)
|
|
OS << ",";
|
|
OS << "Attribute::WillReturn";
|
|
addComma = true;
|
|
}
|
|
if (intrinsic.isCold) {
|
|
if (addComma)
|
|
OS << ",";
|
|
OS << "Attribute::Cold";
|
|
addComma = true;
|
|
}
|
|
if (intrinsic.isNoDuplicate) {
|
|
if (addComma)
|
|
OS << ",";
|
|
OS << "Attribute::NoDuplicate";
|
|
addComma = true;
|
|
}
|
|
if (intrinsic.isConvergent) {
|
|
if (addComma)
|
|
OS << ",";
|
|
OS << "Attribute::Convergent";
|
|
addComma = true;
|
|
}
|
|
if (intrinsic.isSpeculatable) {
|
|
if (addComma)
|
|
OS << ",";
|
|
OS << "Attribute::Speculatable";
|
|
addComma = true;
|
|
}
|
|
|
|
switch (intrinsic.ModRef) {
|
|
case CodeGenIntrinsic::NoMem:
|
|
if (intrinsic.hasSideEffects)
|
|
break;
|
|
if (addComma)
|
|
OS << ",";
|
|
OS << "Attribute::ReadNone";
|
|
break;
|
|
case CodeGenIntrinsic::ReadArgMem:
|
|
if (addComma)
|
|
OS << ",";
|
|
OS << "Attribute::ReadOnly,";
|
|
OS << "Attribute::ArgMemOnly";
|
|
break;
|
|
case CodeGenIntrinsic::ReadMem:
|
|
if (addComma)
|
|
OS << ",";
|
|
OS << "Attribute::ReadOnly";
|
|
break;
|
|
case CodeGenIntrinsic::ReadInaccessibleMem:
|
|
if (addComma)
|
|
OS << ",";
|
|
OS << "Attribute::ReadOnly,";
|
|
OS << "Attribute::InaccessibleMemOnly";
|
|
break;
|
|
case CodeGenIntrinsic::ReadInaccessibleMemOrArgMem:
|
|
if (addComma)
|
|
OS << ",";
|
|
OS << "Attribute::ReadOnly,";
|
|
OS << "Attribute::InaccessibleMemOrArgMemOnly";
|
|
break;
|
|
case CodeGenIntrinsic::WriteArgMem:
|
|
if (addComma)
|
|
OS << ",";
|
|
OS << "Attribute::WriteOnly,";
|
|
OS << "Attribute::ArgMemOnly";
|
|
break;
|
|
case CodeGenIntrinsic::WriteMem:
|
|
if (addComma)
|
|
OS << ",";
|
|
OS << "Attribute::WriteOnly";
|
|
break;
|
|
case CodeGenIntrinsic::WriteInaccessibleMem:
|
|
if (addComma)
|
|
OS << ",";
|
|
OS << "Attribute::WriteOnly,";
|
|
OS << "Attribute::InaccessibleMemOnly";
|
|
break;
|
|
case CodeGenIntrinsic::WriteInaccessibleMemOrArgMem:
|
|
if (addComma)
|
|
OS << ",";
|
|
OS << "Attribute::WriteOnly,";
|
|
OS << "Attribute::InaccessibleMemOrArgMemOnly";
|
|
break;
|
|
case CodeGenIntrinsic::ReadWriteArgMem:
|
|
if (addComma)
|
|
OS << ",";
|
|
OS << "Attribute::ArgMemOnly";
|
|
break;
|
|
case CodeGenIntrinsic::ReadWriteInaccessibleMem:
|
|
if (addComma)
|
|
OS << ",";
|
|
OS << "Attribute::InaccessibleMemOnly";
|
|
break;
|
|
case CodeGenIntrinsic::ReadWriteInaccessibleMemOrArgMem:
|
|
if (addComma)
|
|
OS << ",";
|
|
OS << "Attribute::InaccessibleMemOrArgMemOnly";
|
|
break;
|
|
case CodeGenIntrinsic::ReadWriteMem:
|
|
break;
|
|
}
|
|
OS << "};\n";
|
|
OS << " AS[" << numAttrs++ << "] = AttributeList::get(C, "
|
|
<< "AttributeList::FunctionIndex, Atts);\n";
|
|
}
|
|
|
|
if (numAttrs) {
|
|
OS << " NumAttrs = " << numAttrs << ";\n";
|
|
OS << " break;\n";
|
|
OS << " }\n";
|
|
} else {
|
|
OS << " return AttributeList();\n";
|
|
OS << " }\n";
|
|
}
|
|
}
|
|
|
|
OS << " }\n";
|
|
OS << " }\n";
|
|
OS << " return AttributeList::get(C, makeArrayRef(AS, NumAttrs));\n";
|
|
OS << "}\n";
|
|
OS << "#endif // GET_INTRINSIC_ATTRIBUTES\n\n";
|
|
}
|
|
|
|
void IntrinsicEmitter::EmitIntrinsicToBuiltinMap(
|
|
const CodeGenIntrinsicTable &Ints, bool IsGCC, raw_ostream &OS) {
|
|
StringRef CompilerName = (IsGCC ? "GCC" : "MS");
|
|
typedef std::map<std::string, std::map<std::string, std::string>> BIMTy;
|
|
BIMTy BuiltinMap;
|
|
StringToOffsetTable Table;
|
|
for (unsigned i = 0, e = Ints.size(); i != e; ++i) {
|
|
const std::string &BuiltinName =
|
|
IsGCC ? Ints[i].GCCBuiltinName : Ints[i].MSBuiltinName;
|
|
if (!BuiltinName.empty()) {
|
|
// Get the map for this target prefix.
|
|
std::map<std::string, std::string> &BIM =
|
|
BuiltinMap[Ints[i].TargetPrefix];
|
|
|
|
if (!BIM.insert(std::make_pair(BuiltinName, Ints[i].EnumName)).second)
|
|
PrintFatalError(Ints[i].TheDef->getLoc(),
|
|
"Intrinsic '" + Ints[i].TheDef->getName() +
|
|
"': duplicate " + CompilerName + " builtin name!");
|
|
Table.GetOrAddStringOffset(BuiltinName);
|
|
}
|
|
}
|
|
|
|
OS << "// Get the LLVM intrinsic that corresponds to a builtin.\n";
|
|
OS << "// This is used by the C front-end. The builtin name is passed\n";
|
|
OS << "// in as BuiltinName, and a target prefix (e.g. 'ppc') is passed\n";
|
|
OS << "// in as TargetPrefix. The result is assigned to 'IntrinsicID'.\n";
|
|
OS << "#ifdef GET_LLVM_INTRINSIC_FOR_" << CompilerName << "_BUILTIN\n";
|
|
|
|
OS << "Intrinsic::ID Intrinsic::getIntrinsicFor" << CompilerName
|
|
<< "Builtin(const char "
|
|
<< "*TargetPrefixStr, StringRef BuiltinNameStr) {\n";
|
|
|
|
if (Table.Empty()) {
|
|
OS << " return Intrinsic::not_intrinsic;\n";
|
|
OS << "}\n";
|
|
OS << "#endif\n\n";
|
|
return;
|
|
}
|
|
|
|
OS << " static const char BuiltinNames[] = {\n";
|
|
Table.EmitCharArray(OS);
|
|
OS << " };\n\n";
|
|
|
|
OS << " struct BuiltinEntry {\n";
|
|
OS << " Intrinsic::ID IntrinID;\n";
|
|
OS << " unsigned StrTabOffset;\n";
|
|
OS << " const char *getName() const {\n";
|
|
OS << " return &BuiltinNames[StrTabOffset];\n";
|
|
OS << " }\n";
|
|
OS << " bool operator<(StringRef RHS) const {\n";
|
|
OS << " return strncmp(getName(), RHS.data(), RHS.size()) < 0;\n";
|
|
OS << " }\n";
|
|
OS << " };\n";
|
|
|
|
OS << " StringRef TargetPrefix(TargetPrefixStr);\n\n";
|
|
|
|
// Note: this could emit significantly better code if we cared.
|
|
for (BIMTy::iterator I = BuiltinMap.begin(), E = BuiltinMap.end();I != E;++I){
|
|
OS << " ";
|
|
if (!I->first.empty())
|
|
OS << "if (TargetPrefix == \"" << I->first << "\") ";
|
|
else
|
|
OS << "/* Target Independent Builtins */ ";
|
|
OS << "{\n";
|
|
|
|
// Emit the comparisons for this target prefix.
|
|
OS << " static const BuiltinEntry " << I->first << "Names[] = {\n";
|
|
for (const auto &P : I->second) {
|
|
OS << " {Intrinsic::" << P.second << ", "
|
|
<< Table.GetOrAddStringOffset(P.first) << "}, // " << P.first << "\n";
|
|
}
|
|
OS << " };\n";
|
|
OS << " auto I = std::lower_bound(std::begin(" << I->first << "Names),\n";
|
|
OS << " std::end(" << I->first << "Names),\n";
|
|
OS << " BuiltinNameStr);\n";
|
|
OS << " if (I != std::end(" << I->first << "Names) &&\n";
|
|
OS << " I->getName() == BuiltinNameStr)\n";
|
|
OS << " return I->IntrinID;\n";
|
|
OS << " }\n";
|
|
}
|
|
OS << " return ";
|
|
OS << "Intrinsic::not_intrinsic;\n";
|
|
OS << "}\n";
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OS << "#endif\n\n";
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}
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void llvm::EmitIntrinsicEnums(RecordKeeper &RK, raw_ostream &OS) {
|
|
IntrinsicEmitter(RK).run(OS, /*Enums=*/true);
|
|
}
|
|
|
|
void llvm::EmitIntrinsicImpl(RecordKeeper &RK, raw_ostream &OS) {
|
|
IntrinsicEmitter(RK).run(OS, /*Enums=*/false);
|
|
}
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