forked from OSchip/llvm-project
2596da3174
Have BasicTTI call the base implementation so that both agree on the default behaviour, which the default being a cost of '1'. This has required an X86 specific implementation as it seems to be very reliant on those instructions being free. Changes are also made to AMDGPU so that their implementations distinguish between cost kinds, so that the unrolling isn't affected. PowerPC also has its own implementation to prevent changes to the reg-usage vectorizer test. The cost model test changes now reflect that ret instructions are not generally free. Differential Revision: https://reviews.llvm.org/D79164 |
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| .. | ||
| addressing.ll | ||
| branch-for-predicated-block.ll | ||
| lit.local.cfg | ||
| load-scalarization-cost-0.ll | ||
| load-scalarization-cost-1.ll | ||
| load-store-scalarization-cost.ll | ||
| mem-interleaving-costs-02.ll | ||
| mem-interleaving-costs.ll | ||
| pr38110.ll | ||
| predicated-first-order-recurrence.ll | ||