llvm-project/llvm/test/TableGen
Matt Arsenault 303327d58b TableGen: Allow setting SDNodeProperties on intrinsics
Allows preserving MachineMemOperands on intrinsics
through selection. For reasons I don't understand, this
is a static property of the pattern and the selector
deliberately goes out of its way to drop if not present.

Intrinsics already inherit from SDPatternOperator allowing
them to be used directly in instruction patterns. SDPatternOperator
has a list of SDNodeProperty, but you currently can't set them on
the intrinsic. Without SDNPMemOperand, when the node is selected
any memory operands are always dropped. Allowing setting this
on the intrinsics avoids needing to introduce another equivalent
target node just to have SDNPMemOperand set.

llvm-svn: 321212
2017-12-20 19:36:28 +00:00
..
2003-08-03-PassCode.td
2006-09-18-LargeInt.td
2010-03-24-PrematureDefaults.td
AllowDuplicateRegisterNames.td [TableGen] Give the option of tolerating duplicate register names 2017-12-07 09:51:55 +00:00
AnonDefinitionOnDemand.td
AsmPredicateCondsEmission.td Use std::bitset for SubtargetFeatures. 2015-05-26 10:47:10 +00:00
AsmVariant.td [TableGen] Add a proper namespace to an Instruction in an AsmMatcher test. This is required after r307358. 2017-07-07 05:50:45 +00:00
BitOffsetDecoder.td
BitsInit.td
BitsInitOverflow.td
CStyleComment.td
ClassInstanceValue.td
ConcatenatedSubregs.td Address r311914 review comments 2017-08-28 20:11:27 +00:00
Dag.td
DefmInherit.td
DefmInsideMultiClass.td
DuplicateFieldValues.td [tablegen] Delete duplicates from a vector without skipping elements 2016-12-01 19:38:50 +00:00
FieldAccess.td
ForeachList.td
ForeachLoop.td
ForwardRef.td
GeneralList.td
GlobalISelEmitter.td [globalisel][tablegen] Allow ImmLeaf predicates to use InstructionSelector members 2017-12-20 14:41:51 +00:00
HwModeSelect.td TableGen support for parameterized register class information 2017-09-14 16:56:21 +00:00
Include.inc
Include.td
IntBitInit.td
LazyChange.td
LetInsideMultiClasses.td
ListArgs.td
ListArgsSimple.td
ListConversion.td
ListManip.td
ListOfList.td
ListSlices.td
LoLoL.td
MultiClass.td
MultiClassDefName.td [TableGen] Resolve complex def names inside multiclasses 2015-05-21 04:32:56 +00:00
MultiClassInherit.td
MultiPat.td
NestedForeach.td
Paste.td
RegisterBankEmitter.td TableGen: Fix infinite recursion in RegisterBankEmitter 2017-01-30 15:07:01 +00:00
RegisterEncoder.td [TableGen] Add EncoderMethod to RegisterOperand 2017-05-15 10:13:07 +00:00
SetTheory.td
SiblingForeach.td
Slice.td
String.td
SuperSubclassSameName.td
TargetInstrInfo.td
TargetInstrSpec.td
TemplateArgRename.td
Tree.td
TreeNames.td
TwoLevelName.td Add test cases that will show the bug that was fixed in r256725. 2016-01-13 07:53:11 +00:00
UnsetBitInit.td
UnterminatedComment.td Make shell redirection construct portable 2017-07-12 13:24:46 +00:00
ValidIdentifiers.td
cast-list-initializer.td TableGen: Support folding casts from bits to int 2015-07-31 01:12:06 +00:00
cast.td
defmclass.td
eq.td
eqbit.td
foreach.td
if-empty-list-arg.td
if.td
ifbit.td
intrinsic-long-name.td TableGen: Allow setting SDNodeProperties on intrinsics 2017-12-20 19:36:28 +00:00
intrinsic-struct.td TableGen: Allow setting SDNodeProperties on intrinsics 2017-12-20 19:36:28 +00:00
intrinsic-varargs.td TableGen: Allow setting SDNodeProperties on intrinsics 2017-12-20 19:36:28 +00:00
lisp.td
list-element-bitref.td
listconcat.td
lit.local.cfg
math.td TableGen: Add operator !or 2016-11-15 06:49:28 +00:00
nested-comment.td
pr8330.td
strconcat.td
subst.td
subst2.td
trydecode-emission.td tests: accept different TargetOpcode values. 2016-07-07 17:51:42 +00:00
trydecode-emission2.td tests: accept different TargetOpcode values. 2016-07-07 17:51:42 +00:00
trydecode-emission3.td tests: accept different TargetOpcode values. 2016-07-07 17:51:42 +00:00
usevalname.td