forked from OSchip/llvm-project
33 lines
1.3 KiB
C
33 lines
1.3 KiB
C
// RUN: %clang_cc1 -triple sparcv9-unknown-unknown -emit-llvm %s -o - | FileCheck %s
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void test_gcc_registers(void) {
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register unsigned int regO6 asm("o6") = 0;
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register unsigned int regSP asm("sp") = 1;
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register unsigned int reg14 asm("r14") = 2;
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register unsigned int regI6 asm("i6") = 3;
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register unsigned int regFP asm("fp") = 4;
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register unsigned int reg30 asm("r30") = 5;
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register float fF20 asm("f20") = 8.0;
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register double dF40 asm("f40") = 11.0;
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register long double qF40 asm("f40") = 14.0;
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// Test remapping register names in register ... asm("rN") statments.
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// CHECK: call void asm sideeffect "add $0,$1,$2", "{r14},{r14},{r14}"
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asm volatile("add %0,%1,%2" : : "r" (regO6), "r" (regSP), "r" (reg14));
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// CHECK: call void asm sideeffect "add $0,$1,$2", "{r30},{r30},{r30}"
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asm volatile("add %0,%1,%2" : : "r" (regI6), "r" (regFP), "r" (reg30));
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// CHECK: call void asm sideeffect "fadds $0,$1,$2", "{f20},{f20},{f20}"
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asm volatile("fadds %0,%1,%2" : : "f" (fF20), "f" (fF20), "f"(fF20));
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// CHECK: call void asm sideeffect "faddd $0,$1,$2", "{f40},{f40},{f40}"
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asm volatile("faddd %0,%1,%2" : : "f" (dF40), "f" (dF40), "f"(dF40));
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// CHECK: call void asm sideeffect "faddq $0,$1,$2", "{f40},{f40},{f40}"
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asm volatile("faddq %0,%1,%2" : : "f" (qF40), "f" (qF40), "f"(qF40));
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}
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