forked from OSchip/llvm-project
53 lines
1.6 KiB
C
53 lines
1.6 KiB
C
// REQUIRES: hexagon-registered-target
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// RUN: %clang_cc1 -emit-llvm -O2 -o - -triple hexagon-unknown-elf -target-cpu hexagonv60 %s | FileCheck %s
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// The return value should return the value in A[1].
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// Check that the HexagonBuiltinExpr doesn't evaluate &(*ptr++) twice. If so,
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// the return value will be the value in A[2]
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// CHECK: @brev_ptr_inc
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// CHECK-DAG: llvm.hexagon.L2.loadri.pbr
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// CHECK-DAG: getelementptr{{.*}}i32 1
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// CHECK-NOT: getelementptr{{.*}}i32 2
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// CHECK-NOT: getelementptr{{.*}}i32 1
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int brev_ptr_inc(int A[], int B[]) {
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int *p0 = &B[0];
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int *p1 = &A[0];
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__builtin_brev_ldw(p0, &*p1++, 8);
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return (*p1);
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}
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// The return value should return the value in A[0].
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// CHECK: @brev_ptr_dec
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// CHECK: llvm.hexagon.L2.loadri.pbr
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// CHECK: [[RET:%[0-9]+]] = load{{.*}}%A
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// CHECK: ret{{.*}}[[RET]]
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int brev_ptr_dec(int A[], int B[]) {
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int *p0 = &B[0];
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int *p1 = &A[1];
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__builtin_brev_ldw(p0, &*p1--, 8);
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return (*p1);
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}
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// The store in bitcode needs to be of width correspondng to 16-bit.
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// CHECK: @brev_ptr_half
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// CHECK: llvm.hexagon.L2.loadrh.pbr
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// CHECK: store{{.*}}i16{{.*}}i16*
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short int brev_ptr_half(short int A[], short int B[]) {
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short int *p0 = &B[0];
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short int *p1 = &A[0];
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__builtin_brev_ldh(p0, &*p1++, 8);
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return (*p1);
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}
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// The store in bitcode needs to be of width correspondng to 8-bit.
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// CHECK: @brev_ptr_byte
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// CHECK: llvm.hexagon.L2.loadrub.pbr
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// CHECK: store{{.*}}i8{{.*}}i8*
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unsigned char brev_ptr_byte(unsigned char A[], unsigned char B[]) {
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unsigned char *p0 = &B[0];
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unsigned char *p1 = &A[0];
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__builtin_brev_ldub(p0, &*p1++, 8);
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return (*p1);
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}
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