forked from OSchip/llvm-project
30 lines
781 B
TableGen
30 lines
781 B
TableGen
// RUN: llvm-tblgen -gen-intrinsic-impl -I %p/../../include %s | FileCheck %s
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// XFAIL: vg_leak
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include "llvm/CodeGen/ValueTypes.td"
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class IntrinsicProperty<bit is_default = 0> {
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bit IsDefault = is_default;
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}
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class SDNodeProperty;
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class LLVMType<ValueType vt> {
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ValueType VT = vt;
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}
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class Intrinsic<string name, list<LLVMType> param_types = []> {
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string LLVMName = name;
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bit isTarget = 0;
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string TargetPrefix = "";
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list<LLVMType> RetTypes = [];
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list<LLVMType> ParamTypes = param_types;
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list<IntrinsicProperty> IntrProperties = [];
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list<SDNodeProperty> Properties = [];
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bit DisableDefaultAttributes = 1;
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}
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def llvm_vararg_ty : LLVMType<isVoid>; // this means vararg here
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// CHECK: /* 0 */ 0, 29, 0,
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def int_foo : Intrinsic<"llvm.foo", [llvm_vararg_ty]>;
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