forked from OSchip/llvm-project
46 lines
1.3 KiB
TableGen
46 lines
1.3 KiB
TableGen
// RUN: llvm-tblgen -gen-intrinsic-impl -I %p/../../include %s | FileCheck %s
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// Get the minimum blurb necessary to process ...
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include "llvm/CodeGen/ValueTypes.td"
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include "llvm/CodeGen/SDNodeProperties.td"
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class LLVMType<ValueType vt> {
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ValueType VT = vt;
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int isAny = 0;
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}
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def llvm_i32_ty : LLVMType<i32>;
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class IntrinsicProperty<bit is_default = 0> {
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bit IsDefault = is_default;
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}
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def IntrNoMem : IntrinsicProperty;
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def IntrHasSideEffects : IntrinsicProperty;
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class Intrinsic<list<LLVMType> ret_types,
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list<LLVMType> param_types = [],
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list<IntrinsicProperty> intr_properties = [],
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string name = "",
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list<SDNodeProperty> sd_properties = [],
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bit disable_default_attributes = 0> : SDPatternOperator {
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string LLVMName = name;
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string TargetPrefix = "";
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list<LLVMType> RetTypes = ret_types;
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list<LLVMType> ParamTypes = param_types;
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list<IntrinsicProperty> IntrProperties = intr_properties;
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let Properties = sd_properties;
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bit DisableDefaultAttributes = 1;
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bit isTarget = 0;
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bit DisableDefaultAttributes = disable_default_attributes;
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}
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// ... this intrinsic.
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def int_random_gen : Intrinsic<[llvm_i32_ty], [], [IntrNoMem, IntrHasSideEffects]>;
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// CHECK: 1, // llvm.random.gen
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// CHECK: case 1:
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// CHECK-NEXT: Atts[] = {Attribute::NoUnwind}
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