Simon Pilgrim 23c2182c2b Support generic expansion of ordered vector reduction (PR36732) ... Without the fast math flags, the llvm.experimental.vector.reduce.fadd/fmul intrinsic expansions must be expanded in order. This patch scalarizes the reduction, applying the accumulator at the start of the sequence: ((((Acc + Scl[0]) + Scl[1]) + Scl[2]) + ) ... + Scl[NumElts-1] Differential Revision: https://reviews.llvm.org/D45366 llvm-svn: 329585		2018-04-09 15:44:20 +00:00
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AggressiveInstCombine	Remove unused header to fix layering.	2018-03-29 22:35:59 +00:00
Coroutines	Remove trailing space in build file.	2018-04-07 03:30:28 +00:00
Hello	…
IPO	Fix warning by cl::opt<int> -> cl::opt<unsigned>	2018-04-06 21:41:17 +00:00
InstCombine	[InstCombine] simplify code that propagates FMF; NFC	2018-04-07 14:14:23 +00:00
Instrumentation	hwasan: add -hwasan-match-all-tag flag	2018-04-04 20:44:59 +00:00
ObjCARC	Fix a couple of layering violations in Transforms	2018-03-21 22:34:23 +00:00
Scalar	[MergeICmp] Update debug msg.NFC	2018-04-09 14:29:13 +00:00
Utils	Support generic expansion of ordered vector reduction (PR36732)	2018-04-09 15:44:20 +00:00
Vectorize	[SLP] Fixed formatting, NFC.	2018-04-03 17:48:14 +00:00
CMakeLists.txt	Another try to commit 323321 (aggressive instruction combine).	2018-01-25 12:06:32 +00:00
LLVMBuild.txt	Another try to commit 323321 (aggressive instruction combine).	2018-01-25 12:06:32 +00:00