Alexander Shaposhnikov 8acc3b4ab0 [lld][ELF] Support adrp+ldr GOT optimization for AArch64 ... This diff adds first bits to support relocation relaxations for AArch64 discussed on https://github.com/ARM-software/abi-aa/pull/106. In particular, the case of adrp x0, :got: symbol ldr x0, [x0, :got_lo12: symbol] is handled. Test plan: make check-all Differential revision: https://reviews.llvm.org/D112063		2022-01-10 05:20:37 +00:00
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AArch64.cpp	[lld][ELF] Support adrp+ldr GOT optimization for AArch64	2022-01-10 05:20:37 +00:00
AMDGPU.cpp	[ELF] Replace noneRel = R_*_NONE with static constexpr. NFC	2021-09-25 15:16:44 -07:00
ARM.cpp	[ARM] implement support for ALU/LDR PC-relative group relocations	2021-11-27 10:26:37 +01:00
AVR.cpp	[ELF] Replace noneRel = R_*_NONE with static constexpr. NFC	2021-09-25 15:16:44 -07:00
Hexagon.cpp	[ELF] Rename hasStaticTlsModel to hasTlsIe	2021-11-24 21:06:04 -08:00
MSP430.cpp	[ELF] Use namespace qualifiers (lld:: or elf::) instead of `namespace lld { namespace elf {`	2020-05-15 08:49:53 -07:00
Mips.cpp	[ELF][Mips] Use R_DTPREL for R_MIPS_TLS_DTPREL*	2021-10-30 21:58:43 -07:00
MipsArchTree.cpp	[lib/Object] - Refine interface of ELFFile<ELFT>. NFCI.	2020-09-15 11:38:31 +03:00
PPC.cpp	[ELF] Move gotIndex/pltIndex/globalDynIndex to SymbolAux	2022-01-09 13:43:27 -08:00
PPC64.cpp	[ELF] Move gotIndex/pltIndex/globalDynIndex to SymbolAux	2022-01-09 13:43:27 -08:00
PPCInsns.def	[LLD][PowerPC] Implement GOT to PC-Rel relaxation	2020-08-17 09:36:09 -05:00
RISCV.cpp	[ELF] Rename hasStaticTlsModel to hasTlsIe	2021-11-24 21:06:04 -08:00
SPARCV9.cpp	[ELF] Replace noneRel = R_*_NONE with static constexpr. NFC	2021-09-25 15:16:44 -07:00
X86.cpp	[ELF] Move gotIndex/pltIndex/globalDynIndex to SymbolAux	2022-01-09 13:43:27 -08:00
X86_64.cpp	[ELF] Move gotIndex/pltIndex/globalDynIndex to SymbolAux	2022-01-09 13:43:27 -08:00