Petar Avramovic d7834556b7 Reland [GlobalISel] Start using vectors in GISelKnownBits ... This is recommit of 4c8fb7ddd6. MIR in one unit test had mismatched types. For vectors we consider a bit as known if it is the same for all demanded vector elements (all elements by default). KnownBits BitWidth for vector type is size of vector element. Add support for G_BUILD_VECTOR. This allows combines of urem_pow2_to_mask in pre-legalizer combiner. Differential Revision: https://reviews.llvm.org/D96122		2021-03-04 21:47:13 +01:00
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AArch64	[ObjC][ARC] Use operand bundle 'clang.arc.attachedcall' instead of	2021-03-04 11:22:30 -08:00
AMDGPU	Reland [GlobalISel] Start using vectors in GISelKnownBits	2021-03-04 21:47:13 +01:00
ARC	…
ARM	[mir] Fix confusing MIR when MMO's value is nullptr but offset is non-zero	2021-03-04 10:34:30 -08:00
AVR	[AVR] Fix lifeness issues in the AVR backend	2021-03-04 14:04:39 +01:00
BPF	BPF: Fix a bug in peephole TRUNC elimination optimization	2021-03-02 13:03:42 -08:00
Generic	[CodeGen] New pass: Replace vector intrinsics with call to vector library	2021-02-12 12:53:27 -05:00
Hexagon	…
Inputs	…
Lanai	…
MIR	[mir] Fix confusing MIR when MMO's value is nullptr but offset is non-zero	2021-03-04 10:34:30 -08:00
MSP430	…
Mips	Move EntryExitInstrumentation pass location	2021-03-01 10:08:10 -08:00
NVPTX	[NVPTX][NewPM] Re-enable NVVMReflectPass	2021-02-08 13:58:17 -08:00
PowerPC	[mir] Fix confusing MIR when MMO's value is nullptr but offset is non-zero	2021-03-04 10:34:30 -08:00
RISCV	[RISCV] Fix crash when inserting large fixed-length subvectors	2021-03-04 09:27:16 +00:00
SPARC	[LegalizeTypes] Improve ExpandIntRes_XMULO codegen.	2021-03-01 09:54:32 -08:00
SystemZ	[SystemZ] Reimplement the i8/i16 compare-and-swap logic.	2021-03-03 14:04:32 -06:00
Thumb	[RISCV][PrologEpilogInserter] "Float" emergency spill slots to avoid making them immediately unreachable from the stack pointer	2021-01-23 09:10:03 +00:00
Thumb2	[ARM] KnownBits for CSINC/CSNEG/CSINV	2021-03-04 08:40:20 +00:00
VE	[test] Fix CodeGen/VE/Scalar tests	2021-03-02 15:30:44 -08:00
WebAssembly	[WebAssembly] Swap operand order of call_indirect in text format	2021-03-03 08:51:21 +01:00
WinCFGuard	…
WinEH	…
X86	[mir] Fix confusing MIR when MMO's value is nullptr but offset is non-zero	2021-03-04 10:34:30 -08:00
XCore	[Diagnose] Unify MCContext and LLVMContext diagnosing	2021-03-01 15:58:37 -08:00