forked from OSchip/llvm-project
67 lines
1.9 KiB
CMake
67 lines
1.9 KiB
CMake
set(LLVM_TARGET_DEFINITIONS AMDGPU.td)
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tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info)
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tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
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tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
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tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
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tablegen(LLVM AMDGPUGenSubtargetInfo.inc -gen-subtarget)
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tablegen(LLVM AMDGPUGenIntrinsics.inc -gen-tgt-intrinsic)
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tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter)
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tablegen(LLVM AMDGPUGenDFAPacketizer.inc -gen-dfa-packetizer)
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tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
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tablegen(LLVM AMDGPUGenAsmMatcher.inc -gen-asm-matcher)
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add_public_tablegen_target(AMDGPUCommonTableGen)
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add_llvm_target(AMDGPUCodeGen
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AMDILCFGStructurizer.cpp
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AMDGPUAlwaysInlinePass.cpp
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AMDGPUAsmPrinter.cpp
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AMDGPUFrameLowering.cpp
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AMDGPUIntrinsicInfo.cpp
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AMDGPUISelDAGToDAG.cpp
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AMDGPUMCInstLower.cpp
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AMDGPUMachineFunction.cpp
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AMDGPUOpenCLImageTypeLoweringPass.cpp
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AMDGPUSubtarget.cpp
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AMDGPUTargetMachine.cpp
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AMDGPUTargetTransformInfo.cpp
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AMDGPUISelLowering.cpp
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AMDGPUInstrInfo.cpp
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AMDGPUPromoteAlloca.cpp
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AMDGPURegisterInfo.cpp
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R600ClauseMergePass.cpp
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R600ControlFlowFinalizer.cpp
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R600EmitClauseMarkers.cpp
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R600ExpandSpecialInstrs.cpp
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R600InstrInfo.cpp
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R600ISelLowering.cpp
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R600MachineFunctionInfo.cpp
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R600MachineScheduler.cpp
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R600OptimizeVectorRegisters.cpp
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R600Packetizer.cpp
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R600RegisterInfo.cpp
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R600TextureIntrinsicsReplacer.cpp
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SIAnnotateControlFlow.cpp
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SIFixControlFlowLiveIntervals.cpp
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SIFixSGPRCopies.cpp
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SIFixSGPRLiveRanges.cpp
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SIFoldOperands.cpp
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SIInsertWaits.cpp
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SIInstrInfo.cpp
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SIISelLowering.cpp
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SILoadStoreOptimizer.cpp
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SILowerControlFlow.cpp
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SILowerI1Copies.cpp
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SIMachineFunctionInfo.cpp
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SIPrepareScratchRegs.cpp
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SIRegisterInfo.cpp
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SIShrinkInstructions.cpp
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SITypeRewriter.cpp
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)
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add_subdirectory(AsmParser)
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add_subdirectory(InstPrinter)
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add_subdirectory(TargetInfo)
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add_subdirectory(MCTargetDesc)
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add_subdirectory(Utils)
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