forked from OSchip/llvm-project
22 lines
922 B
LLVM
22 lines
922 B
LLVM
; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=HSA -check-prefix=ALL %s
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; RUN: llc -mtriple=amdgcn-mesa-mesa3d -verify-machineinstrs < %s | FileCheck -check-prefix=MESA -check-prefix=ALL %s
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; ALL-LABEL: {{^}}test:
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; HSA: enable_sgpr_kernarg_segment_ptr = 1
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; HSA: s_load_dword s{{[0-9]+}}, s[4:5], 0xa
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; MESA: s_load_dword s{{[0-9]+}}, s[0:1], 0xa
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define void @test(i32 addrspace(1)* %out) #1 {
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%kernarg.segment.ptr = call noalias i8 addrspace(2)* @llvm.amdgcn.kernarg.segment.ptr()
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%header.ptr = bitcast i8 addrspace(2)* %kernarg.segment.ptr to i32 addrspace(2)*
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%gep = getelementptr i32, i32 addrspace(2)* %header.ptr, i64 10
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%value = load i32, i32 addrspace(2)* %gep
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store i32 %value, i32 addrspace(1)* %out
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ret void
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}
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declare i8 addrspace(2)* @llvm.amdgcn.kernarg.segment.ptr() #0
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attributes #0 = { nounwind readnone }
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attributes #1 = { nounwind }
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