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GC
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GlobalISel
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[GlobalISel] Add support for address-taken basic blocks
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2017-01-05 13:27:52 +00:00 |
3addr-16bit.ll
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3addr-or.ll
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3dnow-intrinsics.ll
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4char-promote.ll
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2003-08-03-CallArgLiveRanges.ll
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2003-08-23-DeadBlockTest.ll
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2003-11-03-GlobalBool.ll
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2004-02-13-FrameReturnAddress.ll
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2004-02-14-InefficientStackPointer.ll
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2004-02-22-Casts.ll
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2004-03-30-Select-Max.ll
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2004-04-13-FPCMOV-Crash.ll
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2004-06-10-StackifierCrash.ll
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2004-10-08-SelectSetCCFold.ll
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2005-01-17-CycleInDAG.ll
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2005-02-14-IllegalAssembler.ll
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2005-05-08-FPStackifierPHI.ll
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2006-01-19-ISelFoldingBug.ll
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2006-03-01-InstrSchedBug.ll
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2006-03-02-InstrSchedBug.ll
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2006-04-04-CrossBlockCrash.ll
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2006-04-27-ISelFoldingBug.ll
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2006-05-01-SchedCausingSpills.ll
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2006-05-02-InstrSched1.ll
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2006-05-02-InstrSched2.ll
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2006-05-08-CoalesceSubRegClass.ll
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2006-05-08-InstrSched.ll
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2006-05-11-InstrSched.ll
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2006-05-17-VectorArg.ll
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2006-05-22-FPSetEQ.ll
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2006-05-25-CycleInDAG.ll
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2006-07-10-InlineAsmAConstraint.ll
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2006-07-12-InlineAsmQConstraint.ll
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2006-07-20-InlineAsm.ll
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2006-07-28-AsmPrint-Long-As-Pointer.ll
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2006-07-31-SingleRegClass.ll
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2006-08-07-CycleInDAG.ll
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2006-08-16-CycleInDAG.ll
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2006-08-21-ExtraMovInst.ll
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2006-09-01-CycleInDAG.ll
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2006-10-02-BoolRetCrash.ll
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2006-10-09-CycleInDAG.ll
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2006-10-10-FindModifiedNodeSlotBug.ll
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2006-10-12-CycleInDAG.ll
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2006-10-13-CycleInDAG.ll
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2006-10-19-SwitchUnnecessaryBranching.ll
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2006-11-12-CSRetCC.ll
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2006-11-17-IllegalMove.ll
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2006-11-27-SelectLegalize.ll
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2006-12-16-InlineAsmCrash.ll
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2006-12-19-IntelSyntax.ll
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2007-01-08-InstrSched.ll
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2007-01-08-X86-64-Pointer.ll
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2007-01-13-StackPtrIndex.ll
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2007-01-29-InlineAsm-ir.ll
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2007-02-04-OrAddrMode.ll
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2007-02-16-BranchFold.ll
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2007-02-19-LiveIntervalAssert.ll
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2007-02-23-DAGCombine-Miscompile.ll
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2007-02-25-FastCCStack.ll
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2007-03-01-SpillerCrash.ll
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2007-03-15-GEP-Idx-Sink.ll
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2007-03-16-InlineAsm.ll
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2007-03-18-LiveIntervalAssert.ll
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2007-03-24-InlineAsmMultiRegConstraint.ll
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2007-03-24-InlineAsmPModifier.ll
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2007-03-24-InlineAsmVectorOp.ll
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2007-03-24-InlineAsmXConstraint.ll
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2007-03-26-CoalescerBug.ll
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2007-04-08-InlineAsmCrash.ll
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2007-04-11-InlineAsmVectorResult.ll
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2007-04-17-LiveIntervalAssert.ll
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2007-04-24-Huge-Stack.ll
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2007-04-24-VectorCrash.ll
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2007-04-27-InlineAsm-IntMemInput.ll
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2007-05-05-Personality.ll
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2007-05-05-VecCastExpand.ll
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2007-05-14-LiveIntervalAssert.ll
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2007-05-15-maskmovq.ll
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2007-05-17-ShuffleISelBug.ll
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2007-06-04-X86-64-CtorAsmBugs.ll
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2007-06-28-X86-64-isel.ll
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2007-06-29-DAGCombinerBug.ll
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2007-06-29-VecFPConstantCSEBug.ll
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2007-07-03-GR64ToVR64.ll
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2007-07-10-StackerAssert.ll
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2007-07-18-Vector-Extract.ll
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2007-08-01-LiveVariablesBug.ll
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2007-08-09-IllegalX86-64Asm.ll
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2007-08-10-SignExtSubreg.ll
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2007-09-05-InvalidAsm.ll
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2007-09-06-ExtWeakAliasee.ll
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2007-09-27-LDIntrinsics.ll
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2007-10-04-AvoidEFLAGSCopy.ll
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Test commit permission. NFC
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2016-10-05 17:22:11 +00:00 |
2007-10-12-CoalesceExtSubReg.ll
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2007-10-12-SpillerUnfold1.ll
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2007-10-12-SpillerUnfold2.ll
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2007-10-14-CoalescerCrash.ll
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2007-10-15-CoalescerCrash.ll
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2007-10-16-CoalescerCrash.ll
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2007-10-19-SpillerUnfold.ll
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2007-10-28-inlineasm-q-modifier.ll
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2007-10-29-ExtendSetCC.ll
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2007-10-30-LSRCrash.ll
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2007-10-31-extractelement-i64.ll
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2007-11-01-ISelCrash.ll
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2007-11-03-x86-64-q-constraint.ll
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2007-11-04-LiveIntervalCrash.ll
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2007-11-04-LiveVariablesBug.ll
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2007-11-04-rip-immediate-constant.ll
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2007-11-06-InstrSched.ll
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2007-11-07-MulBy4.ll
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2007-11-30-LoadFolding-Bug.ll
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2007-12-16-BURRSchedCrash.ll
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2007-12-18-LoadCSEBug.ll
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2008-01-08-IllegalCMP.ll
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2008-01-08-SchedulerCrash.ll
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2008-01-09-LongDoubleSin.ll
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2008-01-16-FPStackifierAssert.ll
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2008-01-16-InvalidDAGCombineXform.ll
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2008-02-05-ISelCrash.ll
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2008-02-06-LoadFoldingBug.ll
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[X86][SSE] Fix domains for VZEXT_LOAD type instructions
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2016-12-15 16:05:29 +00:00 |
2008-02-14-BitMiscompile.ll
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[x86] update test to use FileCheck and auto-generate checks
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2016-10-11 13:36:07 +00:00 |
2008-02-18-TailMergingBug.ll
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2008-02-20-InlineAsmClobber.ll
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2008-02-22-LocalRegAllocBug.ll
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2008-02-25-InlineAsmBug.ll
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2008-02-25-X86-64-CoalescerBug.ll
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2008-02-26-AsmDirectMemOp.ll
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2008-02-27-DeadSlotElimBug.ll
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2008-02-27-PEICrash.ll
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2008-03-06-frem-fpstack.ll
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2008-03-07-APIntBug.ll
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2008-03-10-RegAllocInfLoop.ll
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2008-03-12-ThreadLocalAlias.ll
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2008-03-13-TwoAddrPassCrash.ll
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2008-03-14-SpillerCrash.ll
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2008-03-19-DAGCombinerBug.ll
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2008-03-23-DarwinAsmComments.ll
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2008-03-25-TwoAddrPassBug.ll
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2008-03-31-SpillerFoldingBug.ll
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2008-04-02-unnamedEH.ll
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2008-04-08-CoalescerCrash.ll
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2008-04-09-BranchFolding.ll
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2008-04-15-LiveVariableBug.ll
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2008-04-16-CoalescerBug.ll
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2008-04-16-ReMatBug.ll
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2008-04-17-CoalescerBug.ll
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2008-04-24-MemCpyBug.ll
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2008-04-24-pblendw-fold-crash.ll
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2008-04-26-Asm-Optimize-Imm.ll
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2008-04-28-CoalescerBug.ll
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2008-04-28-CyclicSchedUnit.ll
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2008-05-01-InvalidOrdCompare.ll
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2008-05-09-PHIElimBug.ll
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2008-05-09-ShuffleLoweringBug.ll
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2008-05-12-tailmerge-5.ll
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2008-05-21-CoalescerBug.ll
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2008-05-22-FoldUnalignedLoad.ll
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2008-05-28-CoalescerBug.ll
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2008-05-28-LocalRegAllocBug.ll
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2008-06-13-NotVolatileLoadStore.ll
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2008-06-13-VolatileLoadStore.ll
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2008-06-16-SubregsBug.ll
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2008-06-25-VecISelBug.ll
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2008-07-07-DanglingDeadInsts.ll
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2008-07-09-ELFSectionAttributes.ll
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2008-07-11-SHLBy1.ll
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2008-07-16-CoalescerCrash.ll
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2008-07-19-movups-spills.ll
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2008-07-22-CombinerCrash.ll
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2008-07-23-VSetCC.ll
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2008-08-06-CmpStride.ll
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2008-08-06-RewriterBug.ll
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2008-08-17-UComiCodeGenBug.ll
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2008-08-23-64Bit-maskmovq.ll
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2008-08-31-EH_RETURN32.ll
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2008-08-31-EH_RETURN64.ll
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2008-09-05-sinttofp-2xi32.ll
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2008-09-09-LinearScanBug.ll
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2008-09-11-CoalescerBug.ll
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2008-09-11-CoalescerBug2.ll
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2008-09-17-inline-asm-1.ll
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2008-09-18-inline-asm-2.ll
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2008-09-19-RegAllocBug.ll
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2008-09-25-sseregparm-1.ll
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2008-09-26-FrameAddrBug.ll
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2008-09-29-ReMatBug.ll
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2008-09-29-VolatileBug.ll
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2008-10-06-x87ld-nan-1.ll
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2008-10-06-x87ld-nan-2.ll
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2008-10-07-SSEISelBug.ll
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2008-10-11-CallCrash.ll
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2008-10-13-CoalescerBug.ll
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2008-10-16-VecUnaryOp.ll
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2008-10-17-Asm64bitRConstraint.ll
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2008-10-20-AsmDoubleInI32.ll
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2008-10-24-FlippedCompare.ll
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2008-10-27-CoalescerBug.ll
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2008-10-29-ExpandVAARG.ll
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2008-11-03-F80VAARG.ll
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2008-11-06-testb.ll
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2008-11-13-inlineasm-3.ll
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2008-11-29-ULT-Sign.ll
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Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
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2017-01-11 19:55:19 +00:00 |
2008-12-01-SpillerAssert.ll
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2008-12-01-loop-iv-used-outside-loop.ll
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2008-12-02-IllegalResultType.ll
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2008-12-02-dagcombine-1.ll
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2008-12-02-dagcombine-2.ll
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2008-12-02-dagcombine-3.ll
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2008-12-16-dagcombine-4.ll
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2008-12-19-EarlyClobberBug.ll
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2008-12-22-dagcombine-5.ll
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2008-12-23-crazy-address.ll
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2008-12-23-dagcombine-6.ll
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2009-01-13-DoubleUpdate.ll
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2009-01-16-SchedulerBug.ll
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2009-01-16-UIntToFP.ll
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2009-01-18-ConstantExprCrash.ll
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2009-01-25-NoSSE.ll
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2009-01-26-WrongCheck.ll
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2009-01-27-NullStrings.ll
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2009-01-31-BigShift.ll
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2009-01-31-BigShift2.ll
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2009-01-31-BigShift3.ll
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2009-02-01-LargeMask.ll
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2009-02-03-AnalyzedTwice.ll
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2009-02-04-sext-i64-gep.ll
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2009-02-08-CoalescerBug.ll
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2009-02-09-ivs-different-sizes.ll
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2009-02-11-codegenprepare-reuse.ll
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2009-02-12-DebugInfoVLA.ll
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2009-02-12-InlineAsm-nieZ-constraints.ll
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2009-02-12-SpillerBug.ll
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2009-02-21-ExtWeakInitializer.ll
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2009-02-25-CommuteBug.ll
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2009-02-26-MachineLICMBug.ll
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2009-03-03-BTHang.ll
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2009-03-03-BitcastLongDouble.ll
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2009-03-05-burr-list-crash.ll
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2009-03-07-FPConstSelect.ll
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2009-03-09-APIntCrash.ll
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2009-03-09-SpillerBug.ll
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2009-03-10-CoalescerBug.ll
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2009-03-12-CPAlignBug.ll
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2009-03-13-PHIElimBug.ll
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2009-03-16-PHIElimInLPad.ll
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2009-03-23-LinearScanBug.ll
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2009-03-23-MultiUseSched.ll
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2009-03-23-i80-fp80.ll
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2009-03-25-TestBug.ll
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2009-03-26-NoImplicitFPBug.ll
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2009-04-12-FastIselOverflowCrash.ll
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[X86][FastISel] Fix lowering of overflow result on AVX512 targets
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2016-11-15 13:29:23 +00:00 |
2009-04-12-picrel.ll
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2009-04-13-2AddrAssert-2.ll
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2009-04-13-2AddrAssert.ll
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2009-04-14-IllegalRegs.ll
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2009-04-16-SpillerUnfold.ll
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2009-04-24.ll
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2009-04-25-CoalescerBug.ll
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Recommit 'Remove the restriction that MachineSinking is now stopped by
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2016-08-12 03:33:22 +00:00 |
2009-04-27-CoalescerAssert.ll
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2009-04-27-LiveIntervalsAssert.ll
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2009-04-27-LiveIntervalsAssert2.ll
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2009-04-29-IndirectDestOperands.ll
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2009-04-29-LinearScanBug.ll
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2009-04-29-RegAllocAssert.ll
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2009-04-scale.ll
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2009-05-08-InlineAsmIOffset.ll
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2009-05-11-tailmerge-crash.ll
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2009-05-19-SingleElementExtractElement.ll
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2009-05-23-available_externally.ll
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2009-05-23-dagcombine-shifts.ll
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2009-05-28-DAGCombineCrash.ll
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2009-05-30-ISelBug.ll
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2009-06-02-RewriterBug.ll
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2009-06-03-Win64DisableRedZone.ll
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2009-06-03-Win64SpillXMM.ll
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2009-06-04-VirtualLiveIn.ll
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2009-06-05-VZextByteShort.ll
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2009-06-05-VariableIndexInsert.ll
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2009-06-05-sitofpCrash.ll
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2009-06-06-ConcatVectors.ll
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2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll
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2009-06-15-not-a-tail-call.ll
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2009-06-18-movlp-shuffle-register.ll
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2009-07-06-TwoAddrAssert.ll
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2009-07-07-SplitICmp.ll
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2009-07-09-ExtractBoolFromVector.ll
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2009-07-15-CoalescerBug.ll
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2009-07-16-CoalescerBug.ll
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2009-07-19-AsmExtraOperands.ll
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2009-07-20-CoalescerBug.ll
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2009-07-20-DAGCombineBug.ll
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2009-08-06-branchfolder-crash.ll
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2009-08-06-inlineasm.ll
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2009-08-08-CastError.ll
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2009-08-12-badswitch.ll
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2009-08-14-Win64MemoryIndirectArg.ll
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2009-08-19-LoadNarrowingMiscompile.ll
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2009-08-23-SubRegReuseUndo.ll
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2009-09-10-LoadFoldingBug.ll
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2009-09-10-SpillComments.ll
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2009-09-16-CoalescerBug.ll
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2009-09-19-earlyclobber.ll
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2009-09-21-NoSpillLoopCount.ll
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2009-09-22-CoalescerBug.ll
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2009-09-23-LiveVariablesBug.ll
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2009-10-14-LiveVariablesBug.ll
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2009-10-16-Scope.ll
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2009-10-19-EmergencySpill.ll
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2009-10-19-atomic-cmp-eflags.ll
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2009-10-25-RewriterBug.ll
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2009-11-04-SubregCoalescingBug.ll
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2009-11-13-VirtRegRewriterBug.ll
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2009-11-16-MachineLICM.ll
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2009-11-16-UnfoldMemOpBug.ll
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2009-11-17-UpdateTerminator.ll
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2009-11-18-TwoAddrKill.ll
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2009-11-25-ImpDefBug.ll
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2009-12-01-EarlyClobberBug.ll
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2009-12-11-TLSNoRedZone.ll
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2010-01-05-ZExt-Shl.ll
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2010-01-07-ISelBug.ll
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2010-01-08-Atomic64Bug.ll
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2010-01-11-ExtraPHIArg.ll
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2010-01-13-OptExtBug.ll
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2010-01-15-SelectionDAGCycle.ll
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2010-01-18-DbgValue.ll
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2010-01-19-OptExtBug.ll
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2010-02-01-DbgValueCrash.ll
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2010-02-01-TaillCallCrash.ll
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2010-02-03-DualUndef.ll
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2010-02-04-SchedulerBug.ll
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2010-02-11-NonTemporal.ll
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2010-02-12-CoalescerBug-Impdef.ll
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2010-02-15-ImplicitDefBug.ll
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2010-02-19-TailCallRetAddrBug.ll
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2010-02-23-DAGCombineBug.ll
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2010-02-23-DIV8rDefinesAX.ll
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2010-02-23-RematImplicitSubreg.ll
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2010-02-23-SingleDefPhiJoin.ll
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2010-03-04-Mul8Bug.ll
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2010-03-05-ConstantFoldCFG.ll
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2010-03-05-EFLAGS-Redef.ll
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2010-03-17-ISelBug.ll
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2010-04-06-SSEDomainFixCrash.ll
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2010-04-08-CoalescerBug.ll
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2010-04-13-AnalyzeBranchCrash.ll
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2010-04-21-CoalescerBug.ll
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2010-04-29-CoalescerCrash.ll
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2010-04-30-LocalAlloc-LandingPad.ll
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2010-05-03-CoalescerSubRegClobber.ll
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2010-05-05-LocalAllocEarlyClobber.ll
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2010-05-06-LocalInlineAsmClobber.ll
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2010-05-07-ldconvert.ll
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2010-05-10-DAGCombinerBug.ll
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2010-05-12-FastAllocKills.ll
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2010-05-16-nosseconversion.ll
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2010-05-25-DotDebugLoc.ll
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2010-05-26-DotDebugLoc.ll
|
Renumber testcase metadata nodes after r290153.
|
2016-12-22 00:45:21 +00:00 |
2010-05-26-FP_TO_INT-crash.ll
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…
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2010-05-28-Crash.ll
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…
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2010-06-01-DeadArg-DbgInfo.ll
|
Verifier: Reject any unknown named MD nodes in the llvm.dbg namespace.
|
2016-10-05 22:15:37 +00:00 |
2010-06-09-FastAllocRegisters.ll
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…
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2010-06-14-fast-isel-fs-load.ll
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2010-06-15-FastAllocEarlyCLobber.ll
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2010-06-24-g-constraint-crash.ll
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2010-06-25-CoalescerSubRegDefDead.ll
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2010-06-25-asm-RA-crash.ll
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2010-06-28-FastAllocTiedOperand.ll
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2010-06-28-matched-g-constraint.ll
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2010-07-02-UnfoldBug.ll
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2010-07-02-asm-alignstack.ll
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2010-07-06-DbgCrash.ll
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2010-07-06-asm-RIP.ll
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2010-07-11-FPStackLoneUse.ll
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2010-07-13-indirectXconstraint.ll
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2010-07-15-Crash.ll
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2010-07-29-SetccSimplify.ll
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2010-08-04-MaskedSignedCompare.ll
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2010-08-04-MingWCrash.ll
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2010-08-04-StackVariable.ll
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2010-09-01-RemoveCopyByCommutingDef.ll
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2010-09-16-EmptyFilename.ll
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2010-09-16-asmcrash.ll
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…
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2010-09-17-SideEffectsInChain.ll
|
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
|
2016-12-14 16:43:44 +00:00 |
2010-09-30-CMOV-JumpTable-PHI.ll
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2010-10-08-cmpxchg8b.ll
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2010-11-02-DbgParameter.ll
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2010-11-09-MOVLPS.ll
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2010-11-18-SelectOfExtload.ll
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2011-01-07-LegalizeTypesCrash.ll
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2011-01-10-DagCombineHang.ll
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2011-01-24-DbgValue-Before-Use.ll
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2011-02-04-FastRegallocNoFP.ll
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2011-02-12-shuffle.ll
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2011-02-21-VirtRegRewriter-KillSubReg.ll
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2011-02-23-UnfoldBug.ll
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2011-02-27-Fpextend.ll
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2011-03-02-DAGCombiner.ll
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2011-03-08-Sched-crash.ll
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…
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2011-03-09-Physreg-Coalescing.ll
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2011-03-30-CreateFixedObjCrash.ll
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2011-04-13-SchedCmpJmp.ll
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2011-04-19-sclr-bb.ll
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2011-05-09-loaduse.ll
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2011-05-26-UnreachableBlockElim.ll
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2011-05-27-CrossClassCoalescing.ll
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2011-06-01-fildll.ll
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…
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2011-06-03-x87chain.ll
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2011-06-06-fgetsign80bit.ll
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2011-06-12-FastAllocSpill.ll
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…
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2011-06-14-PreschedRegalias.ll
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2011-06-14-mmx-inlineasm.ll
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…
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2011-06-19-QuicksortCoalescerBug.ll
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…
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2011-07-13-BadFrameIndexDisplacement.ll
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…
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2011-08-23-PerformSubCombine128.ll
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…
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2011-08-23-Trampoline.ll
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…
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2011-08-29-BlockConstant.ll
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2011-08-29-InitOrder.ll
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2011-09-14-valcoalesce.ll
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2011-09-18-sse2cmp.ll
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2011-09-21-setcc-bug.ll
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…
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2011-10-11-SpillDead.ll
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2011-10-11-srl.ll
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2011-10-12-MachineCSE.ll
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…
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2011-10-18-FastISel-VectorParams.ll
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…
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2011-10-19-LegelizeLoad.ll
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…
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2011-10-19-widen_vselect.ll
|
[X86] Modify two tests that passed undef to both sides of a vselect to instead pass unique values.
|
2016-11-24 21:48:50 +00:00 |
2011-10-21-widen-cmp.ll
|
[X86][SSE] Add initial support for combining (V)PMOVZX with shuffles.
|
2016-11-28 17:58:19 +00:00 |
2011-10-27-tstore.ll
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…
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2011-10-30-padd.ll
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…
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2011-11-07-LegalizeBuildVector.ll
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…
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2011-11-22-AVX2-Domains.ll
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…
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2011-11-30-or.ll
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…
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2011-12-06-AVXVectorExtractCombine.ll
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…
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2011-12-06-BitcastVectorGlobal.ll
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…
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2011-12-08-AVXISelBugs.ll
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…
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2011-12-8-bitcastintprom.ll
|
[X86][SSE] Allow folding of store/zext with PEXTRW of 0'th element
|
2016-07-21 14:54:17 +00:00 |
2011-12-15-vec_shift.ll
|
…
|
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2011-12-26-extractelement-duplicate-load.ll
|
[X86][SSE] Regenerate test.
|
2016-12-07 13:05:04 +00:00 |
2011-12-28-vselecti8.ll
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…
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2011-20-21-zext-ui2fp.ll
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…
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2012-01-10-UndefExceptionEdge.ll
|
…
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2012-1-10-buildvector.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
2012-01-11-split-cv.ll
|
…
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2012-01-12-extract-sv.ll
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…
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2012-01-16-mfence-nosse-flags.ll
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…
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2012-01-18-vbitcast.ll
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…
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2012-02-12-dagco.ll
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…
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2012-02-14-scalar.ll
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…
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2012-02-23-mmx-inlineasm.ll
|
…
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2012-02-29-CoalescerBug.ll
|
…
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2012-03-15-build_vector_wl.ll
|
…
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2012-03-20-LargeConstantExpr.ll
|
…
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2012-03-26-PostRALICMBug.ll
|
…
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2012-04-09-TwoAddrPassBug.ll
|
…
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2012-04-26-sdglue.ll
|
…
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2012-05-17-TwoAddressBug.ll
|
…
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2012-05-19-CoalescerCrash.ll
|
…
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2012-07-10-extload64.ll
|
…
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2012-07-10-shufnorm.ll
|
…
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2012-07-15-BuildVectorPromote.ll
|
…
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2012-07-15-broadcastfold.ll
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…
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2012-07-15-tconst_shl.ll
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…
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2012-07-15-vshl.ll
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…
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2012-07-16-LeaUndef.ll
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…
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2012-07-16-fp2ui-i1.ll
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…
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2012-07-17-vtrunc.ll
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…
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2012-07-23-select_cc.ll
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…
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2012-08-07-CmpISelBug.ll
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…
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2012-08-16-setcc.ll
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…
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2012-08-17-legalizer-crash.ll
|
…
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2012-08-28-UnsafeMathCrash.ll
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…
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2012-09-13-dagco-fneg.ll
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…
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2012-09-28-CGPBug.ll
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2012-10-02-DAGCycle.ll
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…
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2012-10-03-DAGCycle.ll
|
…
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2012-10-18-crash-dagco.ll
|
…
|
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2012-11-28-merge-store-alias.ll
|
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
|
2016-12-14 16:43:44 +00:00 |
2012-11-30-handlemove-dbg.ll
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…
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2012-11-30-misched-dbg.ll
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…
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2012-11-30-regpres-dbg.ll
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…
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2012-12-1-merge-multiple.ll
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…
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2012-12-06-python27-miscompile.ll
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…
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2012-12-12-DAGCombineCrash.ll
|
…
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2012-12-14-v8fp80-crash.ll
|
…
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2012-12-19-NoImplicitFloat.ll
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…
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2013-01-09-DAGCombineBug.ll
|
…
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2013-03-13-VEX-DestReg.ll
|
…
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2013-05-06-ConactVectorCrash.ll
|
…
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2013-10-14-FastISel-incorrect-vreg.ll
|
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2014-05-29-factorial.ll
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…
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2014-08-29-CompactUnwind.ll
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9601.ll
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…
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20090313-signext.ll
|
…
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AppendingLinkage.ll
|
…
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Atomics-64.ll
|
…
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DbgValueOtherTargets.test
|
…
|
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MachineBranchProb.ll
|
…
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MachineSink-CritEdge.ll
|
…
|
|
MachineSink-DbgValue.ll
|
…
|
|
MachineSink-PHIUse.ll
|
…
|
|
MachineSink-SubReg.ll
|
Recommit 'Remove the restriction that MachineSinking is now stopped by
|
2016-08-12 03:33:22 +00:00 |
MachineSink-eflags.ll
|
…
|
|
MergeConsecutiveStores.ll
|
The patch fixes (base, index, offset) match.
|
2017-01-04 21:43:39 +00:00 |
StackColoring-dbg.ll
|
…
|
|
StackColoring.ll
|
…
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SwitchLowering.ll
|
…
|
|
SwizzleShuff.ll
|
[x86] use a single shufps when it can save instructions
|
2016-12-15 18:03:38 +00:00 |
TruncAssertZext.ll
|
…
|
|
WidenArith.ll
|
[X86][SSE] Regenerate and add 32-bit tests to widening tests
|
2016-10-08 19:54:28 +00:00 |
abi-isel.ll
|
…
|
|
absolute-bit-mask.ll
|
IR, X86: Understand !absolute_symbol metadata on global variables.
|
2016-12-08 19:01:00 +00:00 |
absolute-bt.ll
|
IR, X86: Understand !absolute_symbol metadata on global variables.
|
2016-12-08 19:01:00 +00:00 |
absolute-constant.ll
|
IR, X86: Understand !absolute_symbol metadata on global variables.
|
2016-12-08 19:01:00 +00:00 |
absolute-rotate.ll
|
IR, X86: Understand !absolute_symbol metadata on global variables.
|
2016-12-08 19:01:00 +00:00 |
add-ext.ll
|
[x86] X86ISelLowering zext(add_nuw(x, C)) --> add(zext(x), C_zext)
|
2016-08-12 16:08:30 +00:00 |
add-of-carry.ll
|
…
|
|
add-sub-nsw-nuw.ll
|
[DAG] disable nsw/nuw for add/sub/mul when simplifying based on demanded bits (PR30841)
|
2016-10-31 23:28:45 +00:00 |
add.ll
|
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
|
2017-01-11 19:55:19 +00:00 |
add32ri8.ll
|
…
|
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add_shl_constant.ll
|
…
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adde-carry.ll
|
…
|
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addr-label-difference.ll
|
…
|
|
addr-mode-matcher.ll
|
…
|
|
addr-of-ret-addr.ll
|
fix function label name in addressofreturnaddress test
|
2016-10-12 23:58:45 +00:00 |
address-type-promotion-constantexpr.ll
|
…
|
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adx-intrinsics.ll
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…
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aes_intrinsics.ll
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…
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alias-gep.ll
|
…
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aliases.ll
|
…
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aligned-comm.ll
|
…
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aligned-variadic.ll
|
…
|
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alignment-2.ll
|
…
|
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alignment.ll
|
…
|
|
all-ones-vector.ll
|
[X86] Expand all-ones-vector test to cover 256-bit and 512-bit vectors.
|
2016-09-27 06:44:27 +00:00 |
alldiv-divdi3.ll
|
…
|
|
alloca-align-rounding-32.ll
|
…
|
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alloca-align-rounding.ll
|
…
|
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allrem-moddi3.ll
|
…
|
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and-encoding.ll
|
…
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and-load-fold.ll
|
…
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and-or-fold.ll
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…
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and-su.ll
|
…
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andimm8.ll
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…
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anyext.ll
|
…
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anyregcc-crash.ll
|
…
|
|
anyregcc.ll
|
[peephole] Enhance folding logic to work for STATEPOINTs
|
2016-12-13 01:38:41 +00:00 |
apm.ll
|
…
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arg-cast.ll
|
…
|
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asm-block-labels.ll
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…
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asm-global-imm.ll
|
…
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asm-indirect-mem.ll
|
…
|
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asm-invalid-register-class-crasher.ll
|
…
|
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asm-label.ll
|
…
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asm-label2.ll
|
…
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asm-mismatched-types.ll
|
…
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asm-modifier-P.ll
|
…
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asm-modifier.ll
|
…
|
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asm-reg-type-mismatch.ll
|
…
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asm-reject-reg-type-mismatch.ll
|
…
|
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atom-call-reg-indirect-foldedreload32.ll
|
…
|
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atom-call-reg-indirect-foldedreload64.ll
|
…
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atom-call-reg-indirect.ll
|
…
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atom-cmpb.ll
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…
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atom-fixup-lea1.ll
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…
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atom-fixup-lea2.ll
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…
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atom-fixup-lea3.ll
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…
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atom-fixup-lea4.ll
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…
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atom-lea-addw-bug.ll
|
…
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atom-lea-sp.ll
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…
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atom-pad-short-functions.ll
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…
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atom-sched.ll
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…
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atom-shuf.ll
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…
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atomic-dagsched.ll
|
…
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atomic-eflags-reuse.ll
|
Revert r291640 change to fold X86 comparison with atomic_load_add.
|
2017-01-17 19:18:57 +00:00 |
atomic-flags.ll
|
…
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atomic-load-store-wide.ll
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…
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atomic-load-store.ll
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…
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atomic-minmax-i6432.ll
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atomic-non-integer.ll
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atomic-ops-ancient-64.ll
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atomic-or.ll
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atomic-pointer.ll
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atomic8.ll
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atomic16.ll
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atomic32.ll
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atomic64.ll
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atomic128.ll
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atomic6432.ll
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atomic_add.ll
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atomic_idempotent.ll
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atomic_mi.ll
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atomic_op.ll
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attribute-sections.ll
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…
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avg.ll
|
[X86][AVX512] Detect repeated constant patterns in BUILD_VECTOR suitable for broadcasting.
|
2016-12-06 12:24:14 +00:00 |
avoid-lea-scale2.ll
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…
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avoid-loop-align-2.ll
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…
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avoid-loop-align.ll
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…
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avoid_complex_am.ll
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…
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avx-arith.ll
|
[X86][SSE] Improve lowering of vXi64 multiplies
|
2016-12-21 20:00:10 +00:00 |
avx-basic.ll
|
[X86] Don't lower FABS/FNEG masking directly to a ConstantPool load. Just create a ConstantFPSDNode and let that be lowered.
|
2016-08-29 04:49:31 +00:00 |
avx-bitcast.ll
|
…
|
|
avx-brcond.ll
|
…
|
|
avx-cast.ll
|
…
|
|
avx-cmp.ll
|
…
|
|
avx-cvt-2.ll
|
…
|
|
avx-cvt.ll
|
[X86] Fix PR30926 - Add patterns for (v)cvtsi2s{s,d} and (v)cvtsd2s{s,d}
|
2017-01-11 09:11:48 +00:00 |
avx-fp2int.ll
|
[X86] Cleanup 'x' and 'y' mnemonic suffixes for vcvtpd2dq/vcvttpd2dq/vcvtpd2ps and similar instructions.
|
2016-11-14 01:53:29 +00:00 |
avx-insertelt.ll
|
…
|
|
avx-intel-ocl.ll
|
[X86] Optimization for replacing LEA with MOV at frame index elimination time
|
2016-09-26 06:42:07 +00:00 |
avx-intrinsics-fast-isel.ll
|
[X86] Cleanup 'x' and 'y' mnemonic suffixes for vcvtpd2dq/vcvttpd2dq/vcvtpd2ps and similar instructions.
|
2016-11-14 01:53:29 +00:00 |
avx-intrinsics-x86-upgrade.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
avx-intrinsics-x86.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
avx-intrinsics-x86_64.ll
|
…
|
|
avx-isa-check.ll
|
…
|
|
avx-load-store.ll
|
…
|
|
avx-logic.ll
|
…
|
|
avx-minmax.ll
|
…
|
|
avx-select.ll
|
…
|
|
avx-shift.ll
|
…
|
|
avx-shuffle-x86_32.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
avx-splat.ll
|
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
|
2017-01-11 19:55:19 +00:00 |
avx-trunc.ll
|
Recommiting unsigned saturation with a bugfix.
|
2017-01-19 12:08:21 +00:00 |
avx-unpack.ll
|
…
|
|
avx-varargs-x86_64.ll
|
…
|
|
avx-vbroadcast.ll
|
[X86][AVX] Ensure broadcast loads respect dependencies
|
2016-10-02 15:59:15 +00:00 |
avx-vbroadcastf128.ll
|
[X86][AVX] Don't use SubVectorBroadcast if there are additional users of the chain (PR29088)
|
2016-08-22 16:47:55 +00:00 |
avx-vextractf128.ll
|
…
|
|
avx-vinsertf128.ll
|
…
|
|
avx-vperm2x128.ll
|
[DAGCombiner] (REAPPLIED) Add vector demanded elements support to computeKnownBits
|
2016-10-29 11:29:39 +00:00 |
avx-vzeroupper.ll
|
…
|
|
avx-win64-args.ll
|
…
|
|
avx-win64.ll
|
…
|
|
avx.ll
|
…
|
|
avx1-logical-load-folding.ll
|
…
|
|
avx2-arith.ll
|
[X86][AVX2] Regenerate arithmetic tests
|
2017-01-07 20:38:36 +00:00 |
avx2-cmp.ll
|
[X86][AVX2] Regenerate and add 32-bit tests to core tests
|
2016-10-08 18:36:57 +00:00 |
avx2-conversions.ll
|
[X86][AVX2] Regenerate and add 32-bit tests to core tests
|
2016-10-08 18:36:57 +00:00 |
avx2-fma-fneg-combine.ll
|
[X86][AVX2] Regenerate and add 32-bit tests to core tests
|
2016-10-08 18:36:57 +00:00 |
avx2-gather.ll
|
[X86][AVX2] Regenerate and add 32-bit tests to core tests
|
2016-10-08 18:36:57 +00:00 |
avx2-intrinsics-fast-isel.ll
|
[X86] Add VBROADCASTF128/VBROADCASTI128 to execution domain fixing tables.
|
2016-09-29 05:54:28 +00:00 |
avx2-intrinsics-x86-upgrade.ll
|
…
|
|
avx2-intrinsics-x86.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
avx2-logic.ll
|
[X86][AVX2] Regenerate and add 32-bit tests to core tests
|
2016-10-08 18:36:57 +00:00 |
avx2-nontemporal.ll
|
…
|
|
avx2-phaddsub.ll
|
[X86][AVX2] Regenerate and add 32-bit tests to core tests
|
2016-10-08 18:36:57 +00:00 |
avx2-pmovxrm.ll
|
[AVX-512] Add an AVX512VL/BW command line to sse41-pmovxrm.ll and avx2-pmovxrm.ll. Also disable peephole so we really test pattern matching.
|
2016-10-10 06:25:42 +00:00 |
avx2-shift.ll
|
[X86][AVX2] Regenerate and add 32-bit tests to core tests
|
2016-10-08 18:36:57 +00:00 |
avx2-vbroadcast.ll
|
[AVX-512] Teach EVEX to VEX conversion pass to handle VINSERT and VEXTRACT instructions.
|
2017-01-03 05:46:18 +00:00 |
avx2-vbroadcasti128.ll
|
[X86][AVX] Don't use SubVectorBroadcast if there are additional users of the chain (PR29088)
|
2016-08-22 16:47:55 +00:00 |
avx2-vector-shifts.ll
|
[X86][AVX2] Regenerate and add 32-bit tests to core tests
|
2016-10-08 18:36:57 +00:00 |
avx2-vperm.ll
|
[X86][AVX2] Regenerate and add 32-bit tests to core tests
|
2016-10-08 18:36:57 +00:00 |
avx512-any_extend_load.ll
|
[X86] Attempt to pre-truncate arithmetic operations if useful
|
2017-01-04 08:05:42 +00:00 |
avx512-arith.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
avx512-bugfix-23634.ll
|
[AVX-512] Remove patterns from the other VBLENDM instructions. They are all redundant with masked move instructions.
|
2017-01-07 22:20:34 +00:00 |
avx512-bugfix-25270.ll
|
[X86] Add EVEX encoded VBROADCASTSS/SD and VPBROADCASTD/Q to execution domain fixing table.
|
2016-09-29 05:54:39 +00:00 |
avx512-bugfix-26264.ll
|
[AVX-512] Teach two address instruction pass to replace masked move instructions with blendm instructions when its beneficial.
|
2017-01-14 07:50:52 +00:00 |
avx512-build-vector.ll
|
[AVX-512] Correct execution domain for VPERMT2PS and VPERMI2PS.
|
2016-10-16 04:54:31 +00:00 |
avx512-calling-conv.ll
|
[AVX-512] Add patterns to use a zero masked VPTERNLOG instruction for vselects of all ones and all zeros.
|
2017-01-09 02:44:34 +00:00 |
avx512-cmp-kor-sequence.ll
|
AVX-512: Changed lowering of BITCAST between i1 vectors and i8/i16/i32 integer values
|
2016-08-07 13:05:58 +00:00 |
avx512-cmp.ll
|
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
|
2017-01-11 19:55:19 +00:00 |
avx512-cvt.ll
|
[AVX-512] Improve lowering of zero_extend of v4i1 to v4i32 and v2i1 to v2i64 with VLX, but no DQ or BW support.
|
2017-01-12 06:49:12 +00:00 |
avx512-ext.ll
|
[AVX-512] Change another pattern that was using BLENDM to use masked moves. A future patch will conver it back to BLENDM if its beneficial to register allocation.
|
2017-01-09 04:19:34 +00:00 |
avx512-extract-subvector.ll
|
[AVX-512] Teach EVEX to VEX conversion pass to handle VINSERT and VEXTRACT instructions.
|
2017-01-03 05:46:18 +00:00 |
avx512-fma-intrinsics.ll
|
X86-FMA3: Implemented commute transformation for EVEX/AVX512 FMA3 opcodes.
|
2016-08-11 22:07:33 +00:00 |
avx512-fma.ll
|
X86-FMA3: Implemented commute transformation for EVEX/AVX512 FMA3 opcodes.
|
2016-08-11 22:07:33 +00:00 |
avx512-fsel.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
avx512-gather-scatter-intrin.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
avx512-i1test.ll
|
AVX-512: Fix for PR28175 - Scalar code optimization.
|
2016-09-13 07:57:00 +00:00 |
avx512-inc-dec.ll
|
…
|
|
avx512-insert-extract.ll
|
[AVX-512] Add patterns to use a zero masked VPTERNLOG instruction for vselects of all ones and all zeros.
|
2017-01-09 02:44:34 +00:00 |
avx512-intel-ocl.ll
|
[X86] Optimization for replacing LEA with MOV at frame index elimination time
|
2016-09-26 06:42:07 +00:00 |
avx512-intrinsics-fast-isel.ll
|
[X86] Add EVEX encoded VBROADCASTSS/SD and VPBROADCASTD/Q to execution domain fixing table.
|
2016-09-29 05:54:39 +00:00 |
avx512-intrinsics-upgrade.ll
|
[AVX-512] Update vextract64x4 intrinsic upgrade test cases to use a legal immediate so they test the instruction selection correctly.
|
2017-01-05 01:34:55 +00:00 |
avx512-intrinsics.ll
|
[AVX-512] Add additional test cases for broadcast intrinsics that demonstates that we don't fold the loads to use a broadcast instruction.
|
2017-01-19 02:34:25 +00:00 |
avx512-load-store.ll
|
[X86][AVX512] Add patterns for all variants of VMOVSS/VMOVSD instructions.
|
2016-11-13 14:29:32 +00:00 |
avx512-logic.ll
|
[AVX-512] Add execution domain fixing for logical operations with broadcast loads. This builds on the handling of masked ops since we need to keep element size the same.
|
2016-09-02 05:29:09 +00:00 |
avx512-mask-bugfix.ll
|
…
|
|
avx512-mask-op.ll
|
[AVX-512] Support ADD/SUB/MUL of mask vectors
|
2017-01-19 07:12:35 +00:00 |
avx512-mask-spills.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
avx512-mask-zext-bugfix.ll
|
[AVX512] Fix v8i1 /v16i1 zext + bitcast lowering pattern. Explicitly zero upper bits.
|
2016-09-05 08:26:51 +00:00 |
avx512-masked-memop-64-32.ll
|
[AVX-512] Teach two address instruction pass to replace masked move instructions with blendm instructions when its beneficial.
|
2017-01-14 07:50:52 +00:00 |
avx512-masked_memop-16-8.ll
|
[AVX-512] Teach two address instruction pass to replace masked move instructions with blendm instructions when its beneficial.
|
2017-01-14 07:50:52 +00:00 |
avx512-mov.ll
|
[AVX-512] Remove patterns from the other VBLENDM instructions. They are all redundant with masked move instructions.
|
2017-01-07 22:20:34 +00:00 |
avx512-nontemporal.ll
|
…
|
|
avx512-pmovxrm.ll
|
[AVX-512] Add support for creating SIGN_EXTEND_VECTOR_INREG and ZERO_EXTEND_VECTOR_INREG for 512-bit vectors to support vpmovzxbq and vpmovsxbq.
|
2016-10-25 04:00:29 +00:00 |
avx512-regcall-Mask.ll
|
[X86] Regcall - Adding support for mask types
|
2016-12-11 14:10:52 +00:00 |
avx512-regcall-NoMask.ll
|
[AVX-512] Teach two address instruction pass to replace masked move instructions with blendm instructions when its beneficial.
|
2017-01-14 07:50:52 +00:00 |
avx512-round.ll
|
…
|
|
avx512-scalar.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
avx512-scalarIntrinsics.ll
|
…
|
|
avx512-select.ll
|
[X86][AVX512] Fix PR31515 - Do not flip vselect condition if it's not a vXi1 mask
|
2017-01-12 06:49:03 +00:00 |
avx512-shift.ll
|
…
|
|
avx512-skx-insert-subvec.ll
|
[AVX-512] Teach shuffle lowering to use vinsert instructions for shuffles corresponding to 256-bit subvector inserts.
|
2017-01-03 07:00:40 +00:00 |
avx512-trunc.ll
|
Recommiting unsigned saturation with a bugfix.
|
2017-01-19 12:08:21 +00:00 |
avx512-unsafe-fp-math.ll
|
…
|
|
avx512-vbroadcast.ll
|
[AVX-512] Add patterns to use a zero masked VPTERNLOG instruction for vselects of all ones and all zeros.
|
2017-01-09 02:44:34 +00:00 |
avx512-vbroadcasti128.ll
|
[AVX-512] Teach EVEX to VEX conversion pass to handle VINSERT and VEXTRACT instructions.
|
2017-01-03 05:46:18 +00:00 |
avx512-vbroadcasti256.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
avx512-vec-cmp.ll
|
[AVX-512] Teach two address instruction pass to replace masked move instructions with blendm instructions when its beneficial.
|
2017-01-14 07:50:52 +00:00 |
avx512-vpermv3-commute.ll
|
[AVX-512] Add support for commuting VPERMT2(B/W/D/Q/PS/PD) to/from VPERMI2(B/W/D/Q/PS/PD).
|
2016-11-22 04:57:34 +00:00 |
avx512-vpternlog-commute.ll
|
[AVX-512] Add support for commuting VPTERNLOG instructions.
|
2016-09-22 03:00:50 +00:00 |
avx512-vselect-crash.ll
|
…
|
|
avx512bw-arith.ll
|
…
|
|
avx512bw-intrinsics-fast-isel.ll
|
…
|
|
avx512bw-intrinsics-upgrade.ll
|
[X86] Remove masking from 512-bit PSHUFB intrinsics in preparation for being able to constant fold it in InstCombineCalls like we do for 128/256-bit.
|
2016-12-10 23:09:43 +00:00 |
avx512bw-intrinsics.ll
|
Added a template for building target specific memory node in DAG.
|
2016-12-21 10:43:36 +00:00 |
avx512bw-mask-op.ll
|
[AVX-512] Support ADD/SUB/MUL of mask vectors
|
2017-01-19 07:12:35 +00:00 |
avx512bw-mov.ll
|
[AVX-512] Remove patterns from the other VBLENDM instructions. They are all redundant with masked move instructions.
|
2017-01-07 22:20:34 +00:00 |
avx512bw-vec-cmp.ll
|
[AVX-512] Teach two address instruction pass to replace masked move instructions with blendm instructions when its beneficial.
|
2017-01-14 07:50:52 +00:00 |
avx512bwvl-arith.ll
|
…
|
|
avx512bwvl-intrinsics-fast-isel.ll
|
…
|
|
avx512bwvl-intrinsics-upgrade.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
avx512bwvl-intrinsics.ll
|
[AVX-512] Teach EVEX to VEX conversion pass to handle VINSERT and VEXTRACT instructions.
|
2017-01-03 05:46:18 +00:00 |
avx512bwvl-mov.ll
|
[AVX-512] Remove patterns from the other VBLENDM instructions. They are all redundant with masked move instructions.
|
2017-01-07 22:20:34 +00:00 |
avx512bwvl-vec-cmp.ll
|
[AVX-512] Teach two address instruction pass to replace masked move instructions with blendm instructions when its beneficial.
|
2017-01-14 07:50:52 +00:00 |
avx512cd-intrinsics.ll
|
…
|
|
avx512cdvl-intrinsics.ll
|
…
|
|
avx512dq-intrinsics-upgrade.ll
|
[AVX-512] Add support for detecting 512-bit shuffles that contain a 128-bit subvector insertion from the lowest subvector of one of the sources.
|
2017-01-04 07:32:03 +00:00 |
avx512dq-intrinsics.ll
|
[AVX-512] Add additional test cases for broadcast intrinsics that demonstates that we don't fold the loads to use a broadcast instruction.
|
2017-01-19 02:34:25 +00:00 |
avx512dq-mask-op.ll
|
AVX-512: Changed lowering of BITCAST between i1 vectors and i8/i16/i32 integer values
|
2016-08-07 13:05:58 +00:00 |
avx512dqvl-intrinsics-upgrade.ll
|
[AVX-512] Teach EVEX to VEX conversion pass to handle VINSERT and VEXTRACT instructions.
|
2017-01-03 05:46:18 +00:00 |
avx512dqvl-intrinsics.ll
|
[AVX-512] Add additional test cases for broadcast intrinsics that demonstates that we don't fold the loads to use a broadcast instruction.
|
2017-01-19 02:34:25 +00:00 |
avx512er-intrinsics.ll
|
…
|
|
avx512ifma-intrinsics.ll
|
Fixed line endings
|
2016-07-21 14:36:41 +00:00 |
avx512ifmavl-intrinsics.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
avx512vbmi-intrinsics.ll
|
[AVX-512] Add support for commuting VPERMT2(B/W/D/Q/PS/PD) to/from VPERMI2(B/W/D/Q/PS/PD).
|
2016-11-22 04:57:34 +00:00 |
avx512vbmivl-intrinsics.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
avx512vl-arith.ll
|
…
|
|
avx512vl-intrinsics-fast-isel.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
avx512vl-intrinsics-upgrade.ll
|
[AVX-512] Teach EVEX to VEX conversion pass to handle VINSERT and VEXTRACT instructions.
|
2017-01-03 05:46:18 +00:00 |
avx512vl-intrinsics.ll
|
[AVX-512] Add additional test cases for broadcast intrinsics that demonstates that we don't fold the loads to use a broadcast instruction.
|
2017-01-19 02:34:25 +00:00 |
avx512vl-logic.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
avx512vl-mov.ll
|
[AVX-512] Remove patterns from the other VBLENDM instructions. They are all redundant with masked move instructions.
|
2017-01-07 22:20:34 +00:00 |
avx512vl-nontemporal.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
avx512vl-vbroadcast.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
avx512vl-vec-cmp.ll
|
[AVX-512] Teach two address instruction pass to replace masked move instructions with blendm instructions when its beneficial.
|
2017-01-14 07:50:52 +00:00 |
barrier-sse.ll
|
…
|
|
barrier.ll
|
…
|
|
base-pointer-and-cmpxchg.ll
|
…
|
|
basic-promote-integers.ll
|
…
|
|
bc-extract.ll
|
…
|
|
bigstructret.ll
|
…
|
|
bigstructret2.ll
|
…
|
|
bit-piece-comment.ll
|
[DIExpression] Introduce a dedicated DW_OP_LLVM_fragment operation
|
2016-12-05 18:04:47 +00:00 |
bit-test-shift.ll
|
…
|
|
bitcast-i256.ll
|
[llvm] Remove redundant --check-prefix=CHECK from tests
|
2016-10-24 18:57:55 +00:00 |
bitcast-int-to-vector.ll
|
…
|
|
bitcast-mmx.ll
|
…
|
|
bitcast.ll
|
…
|
|
bitcast2.ll
|
…
|
|
bitreverse.ll
|
[SelectionDAG] Optimization of BITREVERSE legalization for power-of-2 integer scalar/vector types
|
2016-07-22 16:46:25 +00:00 |
block-placement.ll
|
Using branch probability to guide critical edge splitting.
|
2016-10-20 18:06:52 +00:00 |
block-placement.mir
|
Add missing -mtriple to MIR test case
|
2016-12-15 07:13:50 +00:00 |
bmi-intrinsics-fast-isel-x86_64.ll
|
…
|
|
bmi-intrinsics-fast-isel.ll
|
…
|
|
bmi.ll
|
…
|
|
bool-simplify.ll
|
…
|
|
bool-zext.ll
|
…
|
|
br-fold.ll
|
…
|
|
branchfolding-catchpads.ll
|
Avoid infinite loops in branch folding
|
2016-12-12 23:05:38 +00:00 |
branchfolding-landingpads.ll
|
…
|
|
branchfolding-undef.mir
|
BranchFolder: Fix invalid undef flags after merge.
|
2016-09-20 01:14:42 +00:00 |
brcond.ll
|
…
|
|
break-anti-dependencies.ll
|
…
|
|
break-false-dep.ll
|
Avoid false dependencies of undef machine operands
|
2016-08-11 07:32:08 +00:00 |
broadcast-elm-cross-splat-vec.ll
|
[X86][AVX512] Detect repeated constant patterns in BUILD_VECTOR suitable for broadcasting.
|
2016-12-06 12:24:14 +00:00 |
bss_pagealigned.ll
|
…
|
|
bswap-inline-asm.ll
|
…
|
|
bswap-vector.ll
|
[X86][SSE] Add support for combining SSE VSHLI/VSRLI uniform constant shifts.
|
2016-12-12 13:33:58 +00:00 |
bswap.ll
|
…
|
|
bt.ll
|
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
|
2017-01-11 19:55:19 +00:00 |
btq.ll
|
…
|
|
buildvec-insertvec.ll
|
[X86][SSE] Add initial support for 2 input target shuffle combining.
|
2016-08-05 17:36:14 +00:00 |
bypass-slow-division-32.ll
|
[X86] Modify BypassSlowDivision tests to match their new names (NFC)
|
2017-01-12 19:48:01 +00:00 |
bypass-slow-division-64.ll
|
[X86] Replace AND+IMM64 with SRL/SHL
|
2017-01-12 19:54:27 +00:00 |
bypass-slow-division-tune.ll
|
[X86] Replace AND+IMM64 with SRL/SHL
|
2017-01-12 19:54:27 +00:00 |
byval-align.ll
|
…
|
|
byval-callee-cleanup.ll
|
…
|
|
byval.ll
|
…
|
|
byval2.ll
|
…
|
|
byval3.ll
|
…
|
|
byval4.ll
|
…
|
|
byval5.ll
|
…
|
|
byval6.ll
|
…
|
|
byval7.ll
|
…
|
|
cache-intrinsic.ll
|
…
|
|
call-imm.ll
|
…
|
|
call-push.ll
|
…
|
|
cas.ll
|
…
|
|
catch.ll
|
…
|
|
catchpad-dynamic-alloca.ll
|
…
|
|
catchpad-lifetime.ll
|
…
|
|
catchpad-realign-savexmm.ll
|
…
|
|
catchpad-regmask.ll
|
…
|
|
catchpad-reuse.ll
|
[WinEH] Allow catchpads to reuse the same catch object
|
2016-10-19 17:08:23 +00:00 |
catchpad-weight.ll
|
…
|
|
catchret-empty-fallthrough.ll
|
…
|
|
catchret-fallthrough.ll
|
…
|
|
catchret-regmask.ll
|
…
|
|
cfi.ll
|
…
|
|
cfstring.ll
|
…
|
|
chain_order.ll
|
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
|
2016-12-14 16:43:44 +00:00 |
change-compare-stride-1.ll
|
…
|
|
change-compare-stride-trickiness-0.ll
|
…
|
|
change-compare-stride-trickiness-1.ll
|
…
|
|
change-compare-stride-trickiness-2.ll
|
…
|
|
change-unsafe-fp-math.ll
|
[TM] Restore default TargetOptions in TargetMachine::resetTargetOptions.
|
2017-01-10 23:43:04 +00:00 |
cleanuppad-inalloca.ll
|
…
|
|
cleanuppad-large-codemodel.ll
|
…
|
|
cleanuppad-realign.ll
|
…
|
|
clear_upper_vector_element_bits.ll
|
[X86][SSE] Add missing X86ISD::ANDNP combines.
|
2017-01-22 22:45:23 +00:00 |
clobber-fi0.ll
|
…
|
|
clz.ll
|
Using branch probability to guide critical edge splitting.
|
2016-10-20 18:06:52 +00:00 |
cmov-double.ll
|
…
|
|
cmov-fp.ll
|
…
|
|
cmov-into-branch.ll
|
Codegen: Tail-duplicate during placement.
|
2016-10-11 20:36:43 +00:00 |
cmov.ll
|
[x86] fix usage of stale operands when lowering select
|
2017-01-08 15:53:40 +00:00 |
cmovcmov.ll
|
…
|
|
cmp-fast-isel.ll
|
…
|
|
cmp.ll
|
[X86] Replace AND+IMM64 with SRL/SHL
|
2017-01-12 19:54:27 +00:00 |
cmpxchg-clobber-flags.ll
|
…
|
|
cmpxchg-i1.ll
|
…
|
|
cmpxchg-i128-i1.ll
|
…
|
|
cmpxchg8b_alloca_regalloc_handling.ll
|
[x86] Fixing PR28755 by precomputing the address used in CMPXCHG8B
|
2016-11-24 13:23:35 +00:00 |
cmpxchg16b.ll
|
…
|
|
coal-sections.ll
|
…
|
|
coalesce-esp.ll
|
…
|
|
coalesce-implicitdef.ll
|
…
|
|
coalesce_commute_movsd.ll
|
[X86][SSE] Update register class during MOVSD/MOVSS - BLENDPD/BLENDPS commutation
|
2016-10-07 11:18:38 +00:00 |
coalesce_commute_subreg.ll
|
…
|
|
coalescer-commute1.ll
|
…
|
|
coalescer-commute2.ll
|
…
|
|
coalescer-commute3.ll
|
…
|
|
coalescer-commute4.ll
|
…
|
|
coalescer-commute5.ll
|
…
|
|
coalescer-cross.ll
|
…
|
|
coalescer-dce.ll
|
…
|
|
coalescer-dce2.ll
|
…
|
|
coalescer-identity.ll
|
…
|
|
coalescer-remat.ll
|
…
|
|
coalescer-subreg.ll
|
…
|
|
coalescer-win64.ll
|
Win64: Don't emit unwind info for "leaf" functions (PR30337)
|
2016-09-22 19:50:05 +00:00 |
code_placement.ll
|
…
|
|
code_placement_align_all.ll
|
…
|
|
code_placement_cold_loop_blocks.ll
|
…
|
|
code_placement_eh.ll
|
…
|
|
code_placement_ignore_succ_in_inner_loop.ll
|
…
|
|
code_placement_loop_rotation.ll
|
…
|
|
code_placement_loop_rotation2.ll
|
…
|
|
code_placement_loop_rotation3.ll
|
[llvm] Remove redundant --check-prefix=CHECK from tests
|
2016-10-24 18:57:55 +00:00 |
code_placement_outline_optional_branches.ll
|
…
|
|
codegen-prepare-addrmode-sext.ll
|
…
|
|
codegen-prepare-cast.ll
|
…
|
|
codegen-prepare-crash.ll
|
…
|
|
codegen-prepare-extload.ll
|
…
|
|
codegen-prepare.ll
|
…
|
|
codemodel.ll
|
…
|
|
coff-comdat.ll
|
…
|
|
coff-comdat2.ll
|
…
|
|
coff-comdat3.ll
|
…
|
|
coff-feat00.ll
|
…
|
|
coff-weak.ll
|
…
|
|
coldcc64.ll
|
…
|
|
combine-64bit-vec-binop.ll
|
[x86] auto-generate checks; NFC
|
2016-11-15 18:44:53 +00:00 |
combine-add.ll
|
[DAGCombiner] Update most ADD combines to support general vector combines
|
2016-10-12 13:48:10 +00:00 |
combine-and.ll
|
[DAG] x & x --> x
|
2016-10-30 18:13:30 +00:00 |
combine-avx-intrinsics.ll
|
…
|
|
combine-avx2-intrinsics.ll
|
…
|
|
combine-fcopysign.ll
|
[X86] Cleanup 'x' and 'y' mnemonic suffixes for vcvtpd2dq/vcvttpd2dq/vcvtpd2ps and similar instructions.
|
2016-11-14 01:53:29 +00:00 |
combine-lds.ll
|
…
|
|
combine-mul.ll
|
[X86][SSE] Improve lowering of vXi64 multiplies
|
2016-12-21 20:00:10 +00:00 |
combine-multiplies.ll
|
[X86][SSE] Regenerate multiple combine tests
|
2016-09-20 14:42:45 +00:00 |
combine-or.ll
|
[x86] use a single shufps when it can save instructions
|
2016-12-15 18:03:38 +00:00 |
combine-sdiv.ll
|
[DAGCombiner] Try to use SelectionDAG::isKnownToBeAPowerOfTwo instead of just APInt::isPowerOf2
|
2016-12-14 15:08:13 +00:00 |
combine-sext-in-reg.ll
|
[DAGCombine] Add (sext_in_reg (zext x)) -> (sext x) combine
|
2016-12-06 19:09:37 +00:00 |
combine-shl.ll
|
[x86] use a single shufps when it can save instructions
|
2016-12-15 18:03:38 +00:00 |
combine-sra.ll
|
[x86] use a single shufps when it can save instructions
|
2016-12-15 18:03:38 +00:00 |
combine-srem.ll
|
[DAGCombiner] Try to use SelectionDAG::isKnownToBeAPowerOfTwo instead of just APInt::isPowerOf2
|
2016-12-14 15:08:13 +00:00 |
combine-srl.ll
|
[x86] use a single shufps when it can save instructions
|
2016-12-15 18:03:38 +00:00 |
combine-sse41-intrinsics.ll
|
…
|
|
combine-sub.ll
|
[DAGCombiner] Add vector support to C2-(A+C1) -> (C2-C1)-A folding
|
2016-10-13 12:49:31 +00:00 |
combine-testm-and.ll
|
…
|
|
combine-udiv.ll
|
[DAGCombiner] Try to use SelectionDAG::isKnownToBeAPowerOfTwo instead of just APInt::isPowerOf2
|
2016-12-14 15:08:13 +00:00 |
combine-urem.ll
|
[DAGCombiner] Try to use SelectionDAG::isKnownToBeAPowerOfTwo instead of just APInt::isPowerOf2
|
2016-12-14 15:08:13 +00:00 |
combiner-aa-0.ll
|
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
|
2016-12-14 16:43:44 +00:00 |
combiner-aa-1.ll
|
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
|
2016-12-14 16:43:44 +00:00 |
commute-blend-avx2.ll
|
…
|
|
commute-blend-sse41.ll
|
…
|
|
commute-clmul.ll
|
…
|
|
commute-fcmp.ll
|
…
|
|
commute-intrinsic.ll
|
…
|
|
commute-two-addr.ll
|
…
|
|
commute-xop.ll
|
…
|
|
commuted-blend-mask.ll
|
…
|
|
compact-unwind.ll
|
…
|
|
compare-add.ll
|
…
|
|
compare-global.ll
|
Re-apply r286384, "X86: Introduce the "relocImm" ComplexPattern, which represents a relocatable immediate.", with a fix for 32-bit x86.
|
2016-11-09 23:53:43 +00:00 |
compare-inf.ll
|
…
|
|
compare_folding.ll
|
…
|
|
compiler_used.ll
|
…
|
|
complex-asm.ll
|
…
|
|
complex-fca.ll
|
…
|
|
compress_expand.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
computeKnownBits_urem.ll
|
[X86] Regenerate known bits test
|
2016-10-15 18:56:38 +00:00 |
conditional-indecrement.ll
|
…
|
|
conditional-tailcall.ll
|
Revert r282920 "X86: Allow conditional tail calls in Win64 "leaf" functions (PR26302)"
|
2016-10-05 15:39:27 +00:00 |
const-base-addr.ll
|
…
|
|
constant-combines.ll
|
…
|
|
constant-hoisting-and.ll
|
…
|
|
constant-hoisting-cmp.ll
|
…
|
|
constant-hoisting-optnone.ll
|
…
|
|
constant-hoisting-shift-immediate.ll
|
…
|
|
constant-pool-remat-0.ll
|
…
|
|
constant-pool-sharing.ll
|
…
|
|
constpool.ll
|
…
|
|
constructor.ll
|
[CodeGen] Add support for emitting .init_array instead of .ctors on FreeBSD.
|
2016-09-26 22:53:15 +00:00 |
convert-2-addr-3-addr-inc64.ll
|
…
|
|
copy-eflags.ll
|
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
|
2016-12-14 16:43:44 +00:00 |
copy-propagation.ll
|
Avoid false dependencies of undef machine operands
|
2016-08-11 07:32:08 +00:00 |
copysign-constant-magnitude.ll
|
[x86] add folds for FP logic with vector zeros
|
2016-09-27 22:28:13 +00:00 |
cpus.ll
|
AMD family 17h (znver1) enablement
|
2017-01-10 06:01:16 +00:00 |
crash-O0.ll
|
…
|
|
crash-lre-eliminate-dead-def.ll
|
…
|
|
crash-nosse.ll
|
…
|
|
crash.ll
|
…
|
|
critical-anti-dep-breaker.ll
|
…
|
|
critical-edge-split-2.ll
|
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
|
2017-01-11 19:55:19 +00:00 |
cse-add-with-overflow.ll
|
…
|
|
cstring.ll
|
…
|
|
ctpop-combine.ll
|
…
|
|
cvt16.ll
|
…
|
|
cvtv2f32.ll
|
[X86][SSE] Let 64-bit targets use the fast 2i32-2f32 UINT_TO_FP conversion as well as 32-bit
|
2016-07-30 14:06:59 +00:00 |
cxx_tlscc64.ll
|
…
|
|
dag-fmf-cse.ll
|
…
|
|
dag-merge-fast-accesses.ll
|
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
|
2016-12-14 16:43:44 +00:00 |
dag-optnone.ll
|
In dag-optnone.ll, use varargs instead of win64 to fast SDIsel.
|
2016-07-15 15:30:18 +00:00 |
dag-rauw-cse.ll
|
…
|
|
dagcombine-and-setcc.ll
|
…
|
|
dagcombine-buildvector.ll
|
[llvm] Remove redundant --check-prefix=CHECK from tests
|
2016-10-24 18:57:55 +00:00 |
dagcombine-cse.ll
|
…
|
|
dagcombine-shifts.ll
|
…
|
|
dagcombine-unsafe-math.ll
|
…
|
|
darwin-bzero.ll
|
…
|
|
darwin-no-dead-strip.ll
|
…
|
|
darwin-quote.ll
|
…
|
|
darwin-tls.ll
|
…
|
|
dbg-changes-codegen-branch-folding.ll
|
[X86] Optimization for replacing LEA with MOV at frame index elimination time
|
2016-09-26 06:42:07 +00:00 |
dbg-changes-codegen.ll
|
…
|
|
dbg-combine.ll
|
…
|
|
debugloc-argsize.ll
|
…
|
|
deopt-bundles.ll
|
…
|
|
deopt-intrinsic-cconv.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
deopt-intrinsic.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
disable-tail-calls.ll
|
…
|
|
discontiguous-loops.ll
|
…
|
|
div8.ll
|
…
|
|
divide-by-constant.ll
|
[X86] Add integer division test for PR23590
|
2016-11-16 14:54:34 +00:00 |
divide-windows-itanium.ll
|
CodeGen: use MSVC division on windows itanium
|
2016-10-13 23:00:11 +00:00 |
divrem.ll
|
[X86] Regenerated integer divide tests to test on 32 and 64 bit targets
|
2016-11-16 14:12:11 +00:00 |
divrem8_ext.ll
|
[X86] Regenerated integer divide tests to test on 32 and 64 bit targets
|
2016-11-16 14:12:11 +00:00 |
dllexport-x86_64.ll
|
…
|
|
dllexport.ll
|
…
|
|
dllimport-x86_64.ll
|
…
|
|
dllimport.ll
|
…
|
|
dollar-name.ll
|
…
|
|
dont-trunc-store-double-to-float.ll
|
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
|
2016-12-14 16:43:44 +00:00 |
dropped_constructor.ll
|
Don't create a comdat group for a dropped def with initializer
|
2017-01-18 16:58:43 +00:00 |
dwarf-comp-dir.ll
|
…
|
|
dwarf-eh-prepare.ll
|
…
|
|
dyn-stackalloc.ll
|
…
|
|
dyn_alloca_aligned.ll
|
…
|
|
dynamic-alloca-in-entry.ll
|
…
|
|
dynamic-alloca-lifetime.ll
|
…
|
|
dynamic-allocas-VLAs.ll
|
[X86] Optimization for replacing LEA with MOV at frame index elimination time
|
2016-09-26 06:42:07 +00:00 |
early-cfi-sections.ll
|
Emit .cfi_sections before the first .cfi_startproc
|
2017-01-02 18:05:27 +00:00 |
early-ifcvt-crash.ll
|
…
|
|
early-ifcvt.ll
|
…
|
|
eflags-copy-expansion.mir
|
MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
|
2016-08-25 01:27:13 +00:00 |
eh-label.ll
|
…
|
|
eh-nolandingpads.ll
|
…
|
|
eh-null-personality.ll
|
…
|
|
eh_frame.ll
|
…
|
|
element-wise-atomic-memory-intrinsics.ll
|
Introduce element-wise atomic memcpy intrinsic
|
2016-12-29 14:31:07 +00:00 |
elf-comdat.ll
|
…
|
|
elf-comdat2.ll
|
…
|
|
emit-big-cst.ll
|
…
|
|
empty-functions.ll
|
…
|
|
empty-struct-return-type.ll
|
…
|
|
emutls-pic.ll
|
…
|
|
emutls-pie.ll
|
…
|
|
emutls.ll
|
…
|
|
emutls_generic.ll
|
…
|
|
epilogue.ll
|
…
|
|
equiv_with_fndef.ll
|
…
|
|
equiv_with_vardef.ll
|
…
|
|
evex-to-vex-compress.mir
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
exception-label.ll
|
…
|
|
exedeps-movq.ll
|
…
|
|
exedepsfix-broadcast.ll
|
[X86][SSE] Consistently set MOVD/MOVQ load/store/move instructions to integer domain
|
2016-12-07 12:10:49 +00:00 |
expand-opaque-const.ll
|
…
|
|
expand-vr64-gr64-copy.mir
|
…
|
|
extend.ll
|
…
|
|
extended-fma-contraction.ll
|
…
|
|
extern_weak.ll
|
…
|
|
extmul64.ll
|
…
|
|
extmul128.ll
|
…
|
|
extract-combine.ll
|
…
|
|
extract-concat.ll
|
…
|
|
extract-extract.ll
|
…
|
|
extract-store.ll
|
[X86][SSE] Allow folding of store/zext with PEXTRW of 0'th element
|
2016-07-21 14:54:17 +00:00 |
extractelement-from-arg.ll
|
…
|
|
extractelement-index.ll
|
DAG: Avoid OOB when legalizing vector indexing
|
2017-01-10 22:02:30 +00:00 |
extractelement-legalization-cycle.ll
|
…
|
|
extractelement-legalization-store-ordering.ll
|
DAG: Avoid OOB when legalizing vector indexing
|
2017-01-10 22:02:30 +00:00 |
extractelement-load.ll
|
[X86][SSE] Add support for combining target shuffles to SHUFPS.
|
2016-12-18 14:26:02 +00:00 |
extractelement-shuffle.ll
|
…
|
|
extractps.ll
|
…
|
|
f16c-intrinsics-fast-isel.ll
|
[X86][SSE] Enable commutation from MOVSD/MOVSS to BLENDPD/BLENDPS on SSE41+ targets
|
2016-10-01 14:26:11 +00:00 |
f16c-intrinsics.ll
|
[X86][F16C] Regenerated f16c tests
|
2016-08-24 11:56:15 +00:00 |
fabs.ll
|
…
|
|
fadd-combines.ll
|
…
|
|
fast-cc-callee-pops.ll
|
…
|
|
fast-cc-merge-stack-adj.ll
|
…
|
|
fast-cc-pass-in-regs.ll
|
…
|
|
fast-isel-agg-constant.ll
|
…
|
|
fast-isel-args-fail.ll
|
…
|
|
fast-isel-args-fail2.ll
|
…
|
|
fast-isel-args.ll
|
…
|
|
fast-isel-atomic.ll
|
…
|
|
fast-isel-avoid-unnecessary-pic-base.ll
|
…
|
|
fast-isel-bail.ll
|
…
|
|
fast-isel-bc.ll
|
…
|
|
fast-isel-bitcasts-avx.ll
|
…
|
|
fast-isel-bitcasts-avx512.ll
|
[AVX-512] Teach fast isel to handle 512-bit vector bitcasts.
|
2016-12-05 05:50:51 +00:00 |
fast-isel-bitcasts.ll
|
…
|
|
fast-isel-branch_weights.ll
|
…
|
|
fast-isel-call-bool.ll
|
…
|
|
fast-isel-call.ll
|
Don't optimize movs to pushes in -O0 builds.
|
2016-07-14 15:40:22 +00:00 |
fast-isel-cmp-branch.ll
|
…
|
|
fast-isel-cmp-branch2.ll
|
…
|
|
fast-isel-cmp-branch3.ll
|
…
|
|
fast-isel-cmp.ll
|
[X86] Enable FR32/FR64 cmpeq/cmpne/cmpunord/cmpord to be commuted.
|
2016-08-27 05:22:12 +00:00 |
fast-isel-constant.ll
|
…
|
|
fast-isel-constpool.ll
|
…
|
|
fast-isel-constrain-store-indexreg.ll
|
…
|
|
fast-isel-deadcode.ll
|
…
|
|
fast-isel-divrem-x86-64.ll
|
…
|
|
fast-isel-divrem.ll
|
…
|
|
fast-isel-double-half-convertion.ll
|
…
|
|
fast-isel-emutls.ll
|
…
|
|
fast-isel-expect.ll
|
…
|
|
fast-isel-extract.ll
|
…
|
|
fast-isel-float-half-convertion.ll
|
…
|
|
fast-isel-fneg.ll
|
…
|
|
fast-isel-fold-mem.ll
|
…
|
|
fast-isel-fptrunc-fpext.ll
|
…
|
|
fast-isel-gep.ll
|
…
|
|
fast-isel-gv.ll
|
…
|
|
fast-isel-i1.ll
|
…
|
|
fast-isel-int-float-conversion.ll
|
…
|
|
fast-isel-load-i1.ll
|
[X86][FastISel] Use a COPY from K register to a GPR instead of a K operation
|
2016-09-28 11:22:17 +00:00 |
fast-isel-mem.ll
|
…
|
|
fast-isel-movsbl-indexreg.ll
|
…
|
|
fast-isel-nontemporal.ll
|
…
|
|
fast-isel-ret-ext.ll
|
…
|
|
fast-isel-select-cmov.ll
|
[X86][FastISel] Use a COPY from K register to a GPR instead of a K operation
|
2016-09-28 11:22:17 +00:00 |
fast-isel-select-cmov2.ll
|
…
|
|
fast-isel-select-cmp.ll
|
…
|
|
fast-isel-select-pseudo-cmov.ll
|
…
|
|
fast-isel-select-sse.ll
|
[AVX-512] Teach fast isel to use masked compare and movss for handling scalar cmp and select sequence when AVX-512 is enabled. This matches the behavior of normal isel.
|
2016-12-05 04:51:31 +00:00 |
fast-isel-select.ll
|
…
|
|
fast-isel-sext.ll
|
…
|
|
fast-isel-sse12-fptoint.ll
|
…
|
|
fast-isel-stackcheck.ll
|
…
|
|
fast-isel-store.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
fast-isel-tailcall.ll
|
…
|
|
fast-isel-tls.ll
|
…
|
|
fast-isel-trunc-kill-subreg.ll
|
…
|
|
fast-isel-vecload.ll
|
[AVX-512] Teach fastisel load/store handling to use EVEX encoded instructions for 128/256-bit vectors and scalar single/double.
|
2016-09-05 23:58:40 +00:00 |
fast-isel-x32.ll
|
…
|
|
fast-isel-x86-64.ll
|
[X86] Optimization for replacing LEA with MOV at frame index elimination time
|
2016-09-26 06:42:07 +00:00 |
fast-isel-x86.ll
|
[X86] Optimization for replacing LEA with MOV at frame index elimination time
|
2016-09-26 06:42:07 +00:00 |
fast-isel.ll
|
…
|
|
fastcall-correct-mangling.ll
|
Correct PrivateLinkage for COFF
|
2016-10-13 00:55:24 +00:00 |
fastcc-2.ll
|
…
|
|
fastcc-byval.ll
|
…
|
|
fastcc-sret.ll
|
…
|
|
fastcc.ll
|
…
|
|
fastcc3struct.ll
|
…
|
|
fastisel-gep-promote-before-add.ll
|
…
|
|
fastmath-float-half-conversion.ll
|
…
|
|
fcmove.ll
|
…
|
|
fdiv-combine.ll
|
…
|
|
fdiv.ll
|
…
|
|
field-extract-use-trunc.ll
|
…
|
|
fildll.ll
|
…
|
|
fixup-bw-copy.ll
|
…
|
|
fixup-bw-copy.mir
|
MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
|
2016-08-25 01:27:13 +00:00 |
fixup-bw-inst.ll
|
…
|
|
fixup-lea.ll
|
…
|
|
float-asmprint.ll
|
…
|
|
float-conv-elim.ll
|
…
|
|
floor-soft-float.ll
|
…
|
|
fltused.ll
|
…
|
|
fltused_function_pointer.ll
|
…
|
|
fma-commute-x86.ll
|
…
|
|
fma-do-not-commute.ll
|
[X86] Remove CustomInserter for FMA3 instructions. Looks like since we got full commuting support for FMAs after this was added, the coalescer can now get this right on its own.
|
2016-07-28 15:28:56 +00:00 |
fma-fneg-combine.ll
|
[AVX-512] Remove patterns from the other VBLENDM instructions. They are all redundant with masked move instructions.
|
2017-01-07 22:20:34 +00:00 |
fma-intrinsics-phi-213-to-231.ll
|
Codegen: Tail-duplicate during placement.
|
2016-10-11 20:36:43 +00:00 |
fma-intrinsics-x86.ll
|
…
|
|
fma-phi-213-to-231.ll
|
…
|
|
fma-scalar-memfold.ll
|
[X86][FMA4] Add load folding support for FMA4 scalar intrinsic instructions.
|
2016-11-27 21:37:00 +00:00 |
fma.ll
|
…
|
|
fma4-intrinsics-x86_64-folded-load.ll
|
…
|
|
fma_patterns.ll
|
X86: Add checks for fma_patterns[_wide].ll with -enable-no-infs-fp-math
|
2016-12-08 14:08:08 +00:00 |
fma_patterns_wide.ll
|
X86: Add checks for fma_patterns[_wide].ll with -enable-no-infs-fp-math
|
2016-12-08 14:08:08 +00:00 |
fmaddsub-combine.ll
|
X86-specific path: Implemented the fusing of MUL+ADDSUB to FMADDSUB.
|
2017-01-09 20:26:17 +00:00 |
fmaxnum.ll
|
…
|
|
fminnum.ll
|
…
|
|
fmul-combines.ll
|
…
|
|
fmul-zero.ll
|
…
|
|
fnabs.ll
|
…
|
|
fold-add.ll
|
…
|
|
fold-and-shift.ll
|
…
|
|
fold-call-2.ll
|
…
|
|
fold-call-3.ll
|
…
|
|
fold-call-oper.ll
|
…
|
|
fold-call.ll
|
…
|
|
fold-imm.ll
|
…
|
|
fold-load-binops.ll
|
[AVX512] Mark EVEX VMOVSSrm and VMOVSDrm as canFoldAsLoad and isReMaterializable.
|
2016-07-29 06:06:04 +00:00 |
fold-load-unops.ll
|
…
|
|
fold-load-vec.ll
|
…
|
|
fold-load.ll
|
…
|
|
fold-mul-lohi.ll
|
…
|
|
fold-pcmpeqd-1.ll
|
…
|
|
fold-pcmpeqd-2.ll
|
…
|
|
fold-push.ll
|
…
|
|
fold-sext-trunc.ll
|
…
|
|
fold-tied-op.ll
|
…
|
|
fold-vector-bv-crash.ll
|
…
|
|
fold-vector-sext-crash.ll
|
…
|
|
fold-vector-sext-crash2.ll
|
…
|
|
fold-vector-sext-zext.ll
|
[X86][SSE] Add support for (V)PMOVSX* constant folding
|
2016-10-25 14:29:25 +00:00 |
fold-vector-shl-crash.ll
|
…
|
|
fold-vector-shuffle-crash.ll
|
…
|
|
fold-vector-trunc-sitofp.ll
|
…
|
|
fold-vex.ll
|
…
|
|
fold-xmm-zero.ll
|
…
|
|
fold-zext-trunc.ll
|
…
|
|
fops-windows-itanium.ll
|
CodeGen: adjust floating point operations in Windows itanium
|
2016-10-13 22:38:15 +00:00 |
force-align-stack-alloca.ll
|
…
|
|
force-align-stack.ll
|
…
|
|
fp-double-rounding.ll
|
…
|
|
fp-elim-and-no-fp-elim.ll
|
…
|
|
fp-elim.ll
|
…
|
|
fp-fast.ll
|
…
|
|
fp-immediate-shorten.ll
|
…
|
|
fp-in-intregs.ll
|
…
|
|
fp-load-trunc.ll
|
[X86] Regenerate fp truncate tests
|
2016-08-20 21:56:33 +00:00 |
fp-logic-replace.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
fp-logic.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
fp-select-cmp-and.ll
|
[x86] add fake scalar FP logic instructions to ReplaceableInstrs to save some bytes
|
2016-11-16 17:42:40 +00:00 |
fp-stack-2results.ll
|
…
|
|
fp-stack-O0-crash.ll
|
…
|
|
fp-stack-O0.ll
|
…
|
|
fp-stack-compare-cmov.ll
|
…
|
|
fp-stack-compare.ll
|
…
|
|
fp-stack-direct-ret.ll
|
…
|
|
fp-stack-ret-conv.ll
|
…
|
|
fp-stack-ret-store.ll
|
…
|
|
fp-stack-ret.ll
|
…
|
|
fp-stack-retcopy.ll
|
…
|
|
fp-stack-set-st1.ll
|
…
|
|
fp-stack.ll
|
…
|
|
fp-trunc.ll
|
[X86] Cleanup 'x' and 'y' mnemonic suffixes for vcvtpd2dq/vcvttpd2dq/vcvtpd2ps and similar instructions.
|
2016-11-14 01:53:29 +00:00 |
fp-une-cmp.ll
|
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
|
2017-01-11 19:55:19 +00:00 |
fp2sint.ll
|
…
|
|
fp128-calling-conv.ll
|
…
|
|
fp128-cast.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
fp128-compare.ll
|
…
|
|
fp128-g.ll
|
Renumber testcase metadata nodes after r290153.
|
2016-12-22 00:45:21 +00:00 |
fp128-i128.ll
|
…
|
|
fp128-libcalls.ll
|
…
|
|
fp128-load.ll
|
…
|
|
fp128-select.ll
|
[X86] Accept SELECT op code for x86-64 fp128 type
|
2016-07-18 17:20:09 +00:00 |
fp128-store.ll
|
…
|
|
fp_constant_op.ll
|
…
|
|
fp_load_cast_fold.ll
|
…
|
|
fp_load_fold.ll
|
…
|
|
fpcmp-soft-fp.ll
|
…
|
|
fpstack-debuginstr-kill.ll
|
Renumber testcase metadata nodes after r290153.
|
2016-12-22 00:45:21 +00:00 |
frame-base.ll
|
…
|
|
frame-lowering-debug-intrinsic-2.ll
|
[framelowering] Skip dbg values when getting next/previous instruction.
|
2017-01-04 12:08:35 +00:00 |
frame-lowering-debug-intrinsic.ll
|
[framelowering] Skip dbg values when getting next/previous instruction.
|
2017-01-04 12:08:35 +00:00 |
frame-order.ll
|
…
|
|
frameaddr.ll
|
[X86] Optimization for replacing LEA with MOV at frame index elimination time
|
2016-09-26 06:42:07 +00:00 |
frameregister.ll
|
…
|
|
frem-msvc32.ll
|
…
|
|
fsgsbase.ll
|
…
|
|
fsxor-alignment.ll
|
…
|
|
full-lsr.ll
|
…
|
|
funclet-layout.ll
|
…
|
|
function-alias.ll
|
…
|
|
function-subtarget-features-2.ll
|
…
|
|
function-subtarget-features.ll
|
…
|
|
ga-offset.ll
|
…
|
|
ga-offset2.ll
|
…
|
|
gather-addresses.ll
|
…
|
|
gcc_except_table.ll
|
…
|
|
gcc_except_table_functions.ll
|
…
|
|
gep-expanded-vector.ll
|
Fix bug in DAGBuilder for getelementptr with expanded vector.
|
2016-08-17 07:52:15 +00:00 |
getelementptr.ll
|
…
|
|
ghc-cc.ll
|
…
|
|
ghc-cc64.ll
|
…
|
|
global-access-pie-copyrelocs.ll
|
New llc option pie-copy-relocations to optimize access to extern globals.
|
2016-10-13 20:54:39 +00:00 |
global-access-pie.ll
|
…
|
|
global-fill.ll
|
…
|
|
global-sections-comdat.ll
|
…
|
|
global-sections-tls.ll
|
…
|
|
global-sections.ll
|
…
|
|
gs-fold.ll
|
…
|
|
h-register-addressing-32.ll
|
…
|
|
h-register-addressing-64.ll
|
…
|
|
h-register-store.ll
|
…
|
|
h-registers-0.ll
|
…
|
|
h-registers-1.ll
|
…
|
|
h-registers-2.ll
|
…
|
|
h-registers-3.ll
|
…
|
|
haddsub-2.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
haddsub-undef.ll
|
[X86][SSE] Avoid specifying unused arguments in SHUFPD lowering
|
2016-08-22 12:56:54 +00:00 |
haddsub.ll
|
…
|
|
half.ll
|
Recommit 'Remove the restriction that MachineSinking is now stopped by
|
2016-08-12 03:33:22 +00:00 |
handle-move.ll
|
…
|
|
hhvm-cc.ll
|
…
|
|
hidden-vis-2.ll
|
…
|
|
hidden-vis-3.ll
|
…
|
|
hidden-vis-4.ll
|
…
|
|
hidden-vis-pic.ll
|
CodeGen: Remove MachineFunctionAnalysis => Enable (Machine)ModulePasses
|
2016-08-24 01:52:46 +00:00 |
hidden-vis.ll
|
…
|
|
hipe-cc.ll
|
…
|
|
hipe-cc64.ll
|
…
|
|
hipe-prologue.ll
|
…
|
|
hoist-common.ll
|
…
|
|
hoist-invariant-load.ll
|
…
|
|
hoist-spill-lpad.ll
|
…
|
|
hoist-spill.ll
|
Remove a stale comment from the test, NFC.
|
2016-08-16 16:57:15 +00:00 |
horizontal-shuffle.ll
|
[X86][SSE] Add tests demonstrating missed opportunities to combine 64-bit element unpacks with horizontal pair ops.
|
2016-11-30 11:30:33 +00:00 |
huge-stack-offset.ll
|
…
|
|
i1narrowfail.ll
|
…
|
|
i2k.ll
|
…
|
|
i16lshr8pat.ll
|
…
|
|
i64-mem-copy.ll
|
DAG: Avoid OOB when legalizing vector indexing
|
2017-01-10 22:02:30 +00:00 |
i64-to-float.ll
|
[X86] Attempt to pre-truncate arithmetic operations if useful
|
2017-01-04 08:05:42 +00:00 |
i128-and-beyond.ll
|
…
|
|
i128-immediate.ll
|
…
|
|
i128-mul.ll
|
…
|
|
i128-ret.ll
|
…
|
|
i128-sdiv.ll
|
…
|
|
i256-add.ll
|
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
|
2016-12-14 16:43:44 +00:00 |
i386-setjmp-pic.ll
|
…
|
|
i386-shrink-wrapping.ll
|
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
|
2016-12-14 16:43:44 +00:00 |
i386-tlscall-fastregalloc.ll
|
…
|
|
i486-fence-loop.ll
|
…
|
|
i686-win-shrink-wrapping.ll
|
…
|
|
iabs.ll
|
…
|
|
ident-metadata.ll
|
…
|
|
ifunc-asm.ll
|
…
|
|
illegal-insert.ll
|
…
|
|
illegal-vector-args-return.ll
|
…
|
|
immediate_merging.ll
|
…
|
|
immediate_merging64.ll
|
[x86] Allow merging multiple instances of an immediate within a basic block for code size savings, for 64-bit constants.
|
2016-08-16 21:35:16 +00:00 |
implicit-null-check-negative.ll
|
…
|
|
implicit-null-check.ll
|
…
|
|
implicit-null-checks.mir
|
Make the test accept different OpCode values since it doesn't really care about the value.
|
2017-01-10 22:10:22 +00:00 |
implicit-use-spill.mir
|
[InlineSpiller] Don't call TargetInstrInfo::foldMemoryOperand with an empty list.
|
2016-12-08 00:06:51 +00:00 |
imul-lea-2.ll
|
…
|
|
imul-lea.ll
|
…
|
|
imul.ll
|
[X86] Improve mul combine for negative multiplayer (2^c - 1)
|
2017-01-18 09:31:13 +00:00 |
inalloca-ctor.ll
|
…
|
|
inalloca-invoke.ll
|
…
|
|
inalloca-regparm.ll
|
…
|
|
inalloca-stdcall.ll
|
…
|
|
inalloca.ll
|
…
|
|
inconsistent_landingpad.ll
|
…
|
|
indirect-hidden.ll
|
…
|
|
init-priority.ll
|
[CodeGen] Switch test as FreeBSD will support .init_array soon.
|
2016-09-26 22:38:17 +00:00 |
inline-asm-2addr.ll
|
…
|
|
inline-asm-R-constraint.ll
|
…
|
|
inline-asm-avx-v-constraint-32bit.ll
|
Fixed windows stdout/stderr redirection in inline asm constraint tests
|
2016-10-10 11:11:27 +00:00 |
inline-asm-avx-v-constraint.ll
|
[x86][inline-asm][llvm] accept 'v' constraint
|
2016-10-10 05:48:56 +00:00 |
inline-asm-avx512f-v-constraint.ll
|
[x86][inline-asm][llvm] accept 'v' constraint
|
2016-10-10 05:48:56 +00:00 |
inline-asm-avx512vl-v-constraint-32bit.ll
|
Fixed windows stdout/stderr redirection in inline asm constraint tests
|
2016-10-10 11:11:27 +00:00 |
inline-asm-avx512vl-v-constraint.ll
|
[x86][inline-asm][llvm] accept 'v' constraint
|
2016-10-10 05:48:56 +00:00 |
inline-asm-bad-constraint-n.ll
|
…
|
|
inline-asm-duplicated-constraint.ll
|
…
|
|
inline-asm-error.ll
|
…
|
|
inline-asm-flag-clobber.ll
|
…
|
|
inline-asm-fpstack.ll
|
Updated test with -verify-machineinstrs to check for PR21931
|
2016-11-30 13:21:12 +00:00 |
inline-asm-h.ll
|
…
|
|
inline-asm-modifier-n.ll
|
…
|
|
inline-asm-modifier-q.ll
|
…
|
|
inline-asm-mrv.ll
|
…
|
|
inline-asm-out-regs.ll
|
…
|
|
inline-asm-pic.ll
|
…
|
|
inline-asm-ptr-cast.ll
|
…
|
|
inline-asm-q-regs.ll
|
…
|
|
inline-asm-sp-clobber-memcpy.ll
|
…
|
|
inline-asm-stack-realign.ll
|
…
|
|
inline-asm-stack-realign2.ll
|
…
|
|
inline-asm-stack-realign3.ll
|
…
|
|
inline-asm-tied.ll
|
[DAGCombiner] Do not remove the load of stored values when optimizations are disabled
|
2016-10-12 13:44:24 +00:00 |
inline-asm-x-scalar.ll
|
…
|
|
inline-asm.ll
|
…
|
|
inline-sse.ll
|
…
|
|
inlineasm-sched-bug.ll
|
…
|
|
inreg.ll
|
…
|
|
ins_split_regalloc.ll
|
…
|
|
ins_subreg_coalesce-1.ll
|
…
|
|
ins_subreg_coalesce-2.ll
|
…
|
|
ins_subreg_coalesce-3.ll
|
…
|
|
insert-positions.ll
|
…
|
|
insertelement-copytoregs.ll
|
…
|
|
insertelement-legalize.ll
|
…
|
|
insertelement-zero.ll
|
[X86][SSE] Add missing X86ISD::ANDNP combines.
|
2017-01-22 22:45:23 +00:00 |
insertps-O0-bug.ll
|
…
|
|
insertps-combine.ll
|
[X86][SSE] Add support for combining VZEXT_MOVL target shuffles
|
2016-08-24 18:07:53 +00:00 |
insertps-from-constantpool.ll
|
…
|
|
insertps-unfold-load-bug.ll
|
…
|
|
int-intrinsic.ll
|
…
|
|
interval-update-remat.ll
|
…
|
|
invalid-liveness.mir
|
LiveRangeCalc: Fix reporting of invalid vreg usage in liveness calculation
|
2016-09-19 16:49:45 +00:00 |
invalid-shift-immediate.ll
|
…
|
|
ipra-inline-asm.ll
|
…
|
|
ipra-local-linkage.ll
|
Add missing test for r275347 "[IPRA] Set callee saved registers to none for local function when IPRA is enabled."
|
2016-07-14 01:31:20 +00:00 |
ipra-reg-alias.ll
|
IPRA: Fix RegMask calculation for alias registers
|
2016-07-21 03:50:39 +00:00 |
ipra-reg-usage.ll
|
…
|
|
ipra-transform.ll
|
…
|
|
isel-optnone.ll
|
…
|
|
isel-sink.ll
|
…
|
|
isel-sink2.ll
|
…
|
|
isel-sink3.ll
|
…
|
|
isint.ll
|
…
|
|
isnan.ll
|
…
|
|
isnan2.ll
|
…
|
|
ispositive.ll
|
…
|
|
jump_sign.ll
|
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
|
2017-01-11 19:55:19 +00:00 |
known-bits-vector.ll
|
[SelectionDAG] Improve knownbits handling of UMIN/UMAX (PR31293)
|
2017-01-19 22:41:22 +00:00 |
known-bits.ll
|
[X86][SSE] Add support for combining AND bitmasks to shuffles.
|
2016-12-01 15:41:40 +00:00 |
label-redefinition.ll
|
…
|
|
lakemont.ll
|
…
|
|
large-code-model-isel.ll
|
…
|
|
large-constants.ll
|
…
|
|
large-gep-chain.ll
|
…
|
|
large-gep-scale.ll
|
…
|
|
large-global.ll
|
…
|
|
late-address-taken.ll
|
…
|
|
ldzero.ll
|
…
|
|
lea-2.ll
|
…
|
|
lea-3.ll
|
…
|
|
lea-4.ll
|
…
|
|
lea-5.ll
|
…
|
|
lea-opt-memop-check-1.ll
|
[X86] Optimization for replacing LEA with MOV at frame index elimination time
|
2016-09-26 06:42:07 +00:00 |
lea-opt-memop-check-2.ll
|
…
|
|
lea-opt.ll
|
…
|
|
lea-recursion.ll
|
…
|
|
lea.ll
|
…
|
|
leaf-fp-elim.ll
|
…
|
|
legalize-fmp-oeq-vector-select.ll
|
…
|
|
legalize-libcalls.ll
|
…
|
|
legalize-shift-64.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
legalize-shl-vec.ll
|
[X86] Regenerate v2i256 shift legalization tests
|
2016-07-25 21:14:22 +00:00 |
legalize-sub-zero-2.ll
|
…
|
|
legalize-sub-zero.ll
|
…
|
|
legalizedag_vec.ll
|
…
|
|
lfence.ll
|
…
|
|
libcall-sret.ll
|
…
|
|
licm-dominance.ll
|
…
|
|
licm-nested.ll
|
Revert r286999 which caused buildbot test failures. Some testcases need to be made target specific.
|
2016-11-15 19:42:05 +00:00 |
licm-regpressure.ll
|
…
|
|
licm-symbol.ll
|
…
|
|
limited-prec.ll
|
…
|
|
lit.local.cfg
|
…
|
|
live-out-reg-info.ll
|
…
|
|
live-range-nosubreg.ll
|
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
|
2016-12-14 16:43:44 +00:00 |
liveness-local-regalloc.ll
|
…
|
|
llc-override-mcpu-mattr.ll
|
…
|
|
load-slice.ll
|
…
|
|
loc-remat.ll
|
…
|
|
local_stack_symbol_ordering.ll
|
[X86] Optimization for replacing LEA with MOV at frame index elimination time
|
2016-09-26 06:42:07 +00:00 |
localescape.ll
|
…
|
|
log2_not_readnone.ll
|
…
|
|
logical-load-fold.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
long-setcc.ll
|
…
|
|
longlong-deadload.ll
|
…
|
|
loop-blocks.ll
|
[MBP] do not reorder and move up loop latch block
|
2016-08-16 19:50:33 +00:00 |
loop-hoist.ll
|
…
|
|
loop-search.ll
|
Using branch probability to guide critical edge splitting.
|
2016-10-20 18:06:52 +00:00 |
loop-strength-reduce-2.ll
|
…
|
|
loop-strength-reduce-3.ll
|
…
|
|
loop-strength-reduce-crash.ll
|
[LSR] Tweak loop-strength-reduce-crash test. Test-only change.
|
2016-11-10 22:37:13 +00:00 |
loop-strength-reduce.ll
|
…
|
|
loop-strength-reduce2.ll
|
…
|
|
loop-strength-reduce4.ll
|
…
|
|
loop-strength-reduce5.ll
|
…
|
|
loop-strength-reduce6.ll
|
…
|
|
loop-strength-reduce7.ll
|
…
|
|
loop-strength-reduce8.ll
|
…
|
|
lower-bitcast.ll
|
[X86][SSE] Add support for combining target shuffles to SHUFPS.
|
2016-12-18 14:26:02 +00:00 |
lower-vec-shift-2.ll
|
[X86] Optimize vector shifts with variable but uniform shift amounts
|
2017-01-05 15:11:43 +00:00 |
lower-vec-shift.ll
|
[X86][SSE] Don't blend vector shifts with MOVSS/MOVSD directly, lower from generic shuffle
|
2016-09-14 14:08:18 +00:00 |
lower-vec-shuffle-bug.ll
|
…
|
|
lsr-delayed-fold.ll
|
…
|
|
lsr-i386.ll
|
…
|
|
lsr-interesting-step.ll
|
…
|
|
lsr-loop-exit-cond.ll
|
[LSR] Don't try and create post-inc expressions on non-rotated loops
|
2016-08-15 07:53:03 +00:00 |
lsr-negative-stride.ll
|
…
|
|
lsr-nonaffine.ll
|
…
|
|
lsr-normalization.ll
|
…
|
|
lsr-overflow.ll
|
…
|
|
lsr-quadratic-expand.ll
|
…
|
|
lsr-redundant-addressing.ll
|
…
|
|
lsr-reuse-trunc.ll
|
…
|
|
lsr-reuse.ll
|
…
|
|
lsr-sort.ll
|
…
|
|
lsr-static-addr.ll
|
…
|
|
lsr-wrap.ll
|
…
|
|
lzcnt-tzcnt.ll
|
…
|
|
lzcnt-zext-cmp.ll
|
AMD family 17h (znver1) enablement
|
2017-01-10 06:01:16 +00:00 |
lzcnt.ll
|
…
|
|
machine-combiner-int-vec.ll
|
…
|
|
machine-combiner-int.ll
|
…
|
|
machine-combiner.ll
|
…
|
|
machine-copy-prop.mir
|
MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
|
2016-08-25 01:27:13 +00:00 |
machine-cp.ll
|
…
|
|
machine-cse.ll
|
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
|
2017-01-11 19:55:19 +00:00 |
machine-sink-and-implicit-null-checks.ll
|
…
|
|
machine-sink.ll
|
Using branch probability to guide critical edge splitting.
|
2016-10-20 18:06:52 +00:00 |
machine-trace-metrics-crash.ll
|
…
|
|
macho-comdat.ll
|
…
|
|
mask-negated-bool.ll
|
[DAG] add fold for masked negated sign-extended bool
|
2016-10-11 17:05:52 +00:00 |
masked-iv-safe.ll
|
…
|
|
masked-iv-unsafe.ll
|
…
|
|
masked_gather_scatter.ll
|
[AVX-512] Fix a couple test cases to not pass an undef mask to gather intrinsic. This could break if any future optimizations taken advantage of the undef.
|
2017-01-20 07:12:30 +00:00 |
masked_memop.ll
|
[AVX-512] Teach two address instruction pass to replace masked move instructions with blendm instructions when its beneficial.
|
2017-01-14 07:50:52 +00:00 |
maskmovdqu.ll
|
…
|
|
materialize.ll
|
…
|
|
mature-mc-support.ll
|
…
|
|
mbp-false-cfg-break.ll
|
…
|
|
mcinst-avx-lowering.ll
|
…
|
|
mcinst-lowering.ll
|
…
|
|
mcu-abi.ll
|
…
|
|
mem-intrin-base-reg.ll
|
[DAGCombine] Don't fold a trunc if it feeds an anyext
|
2016-09-01 17:59:24 +00:00 |
mem-promote-integers.ll
|
…
|
|
membarrier.ll
|
…
|
|
memcmp.ll
|
Revert "[TLI] Robustize SDAG proto checking by merging it into TLI."
|
2017-01-17 03:31:00 +00:00 |
memcpy-2.ll
|
…
|
|
memcpy-from-string.ll
|
…
|
|
memcpy.ll
|
…
|
|
mempcpy.ll
|
Revert "[TLI] Robustize SDAG proto checking by merging it into TLI."
|
2017-01-17 03:31:00 +00:00 |
memset-2.ll
|
…
|
|
memset-3.ll
|
…
|
|
memset-nonzero.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
memset-sse-stack-realignment.ll
|
…
|
|
memset.ll
|
…
|
|
memset64-on-x86-32.ll
|
…
|
|
merge-consecutive-loads-128.ll
|
[X86][SSE] Add support for combining target shuffles to SHUFPS.
|
2016-12-18 14:26:02 +00:00 |
merge-consecutive-loads-256.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
merge-consecutive-loads-512.ll
|
Fix blend mask by switch the side of the operand since Blend node uses opposite mask then Select NODE.
|
2017-01-15 16:43:14 +00:00 |
merge-consecutive-stores-i1.ll
|
…
|
|
merge-sp-update-lea.ll
|
…
|
|
merge-store-partially-alias-loads.ll
|
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
|
2016-12-14 16:43:44 +00:00 |
merge_store.ll
|
…
|
|
mfence.ll
|
…
|
|
mingw-alloca.ll
|
…
|
|
misaligned-memset.ll
|
…
|
|
misched-aa-colored.ll
|
…
|
|
misched-aa-mmos.ll
|
…
|
|
misched-balance.ll
|
…
|
|
misched-code-difference-with-debug.ll
|
Renumber testcase metadata nodes after r290153.
|
2016-12-22 00:45:21 +00:00 |
misched-copy.ll
|
…
|
|
misched-crash.ll
|
…
|
|
misched-fusion.ll
|
…
|
|
misched-ilp.ll
|
…
|
|
misched-matmul.ll
|
…
|
|
misched-matrix.ll
|
…
|
|
misched-new.ll
|
…
|
|
mmx-arg-passing-x86-64.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
mmx-arg-passing.ll
|
…
|
|
mmx-arith.ll
|
…
|
|
mmx-bitcast-fold.ll
|
…
|
|
mmx-bitcast.ll
|
[X86] Apply the Update LLC Test Checks tool on the mmx-bitcast test
|
2016-10-22 07:15:00 +00:00 |
mmx-coalescing.ll
|
…
|
|
mmx-copy-gprs.ll
|
…
|
|
mmx-fold-load.ll
|
…
|
|
mmx-intrinsics.ll
|
…
|
|
mmx-only.ll
|
…
|
|
mod128.ll
|
…
|
|
movbe.ll
|
…
|
|
movfs.ll
|
…
|
|
movgs.ll
|
…
|
|
movmsk.ll
|
…
|
|
movntdq-no-avx.ll
|
…
|
|
movpc32-check.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
movtopush.ll
|
…
|
|
movtopush64.ll
|
…
|
|
ms-inline-asm.ll
|
Recognize ${:uid} escapes in intel syntax inline asm
|
2016-11-29 00:29:27 +00:00 |
mul-i256.ll
|
Integer legalization: fix MUL expansion
|
2016-11-15 18:29:24 +00:00 |
mul-i512.ll
|
[RegAllocGreedy] Record missed hint for late recoloring.
|
2016-11-16 01:07:12 +00:00 |
mul-i1024.ll
|
[RegAllocGreedy] Record missed hint for late recoloring.
|
2016-11-16 01:07:12 +00:00 |
mul-legalize.ll
|
…
|
|
mul-remat.ll
|
…
|
|
mul-shift-reassoc.ll
|
…
|
|
mul64.ll
|
…
|
|
mul128.ll
|
…
|
|
mul128_sext_loop.ll
|
…
|
|
muloti.ll
|
…
|
|
mult-alt-generic-i686.ll
|
…
|
|
mult-alt-generic-x86_64.ll
|
…
|
|
mult-alt-x86.ll
|
…
|
|
multiple-loop-post-inc.ll
|
…
|
|
multiple-return-values-cross-block.ll
|
…
|
|
mulx32.ll
|
…
|
|
mulx64.ll
|
…
|
|
musttail-fastcall.ll
|
…
|
|
musttail-indirect.ll
|
…
|
|
musttail-thiscall.ll
|
…
|
|
musttail-varargs.ll
|
…
|
|
musttail.ll
|
…
|
|
mwaitx.ll
|
…
|
|
named-reg-alloc.ll
|
…
|
|
named-reg-notareg.ll
|
…
|
|
nancvt.ll
|
…
|
|
narrow-shl-cst.ll
|
…
|
|
narrow-shl-load.ll
|
…
|
|
narrow_op-1.ll
|
…
|
|
neg-shl-add.ll
|
…
|
|
neg_cmp.ll
|
…
|
|
neg_fp.ll
|
…
|
|
negate-add-zero.ll
|
…
|
|
negate-i1.ll
|
[DAG] optimize negation of bool
|
2016-10-19 16:58:59 +00:00 |
negate-shift.ll
|
[DAG] add folds for negated shifted sign bit
|
2016-10-14 14:26:47 +00:00 |
negate.ll
|
[DAG] enhance computeKnownBits to handle SHL with vector splat constant
|
2016-10-21 20:16:27 +00:00 |
negative-offset.ll
|
…
|
|
negative-sin.ll
|
[DAG] use SDNode flags 'nsz' to enable fadd/fsub with zero folds
|
2016-10-21 14:36:58 +00:00 |
negative-stride-fptosi-user.ll
|
…
|
|
negative-subscript.ll
|
…
|
|
negative_zero.ll
|
…
|
|
new-remat.ll
|
…
|
|
newline-and-quote.ll
|
…
|
|
no-and8ri8.ll
|
[X86] Do not use AND8ri8 in AVX512 pattern
|
2016-07-21 22:24:08 +00:00 |
no-cmov.ll
|
…
|
|
no-prolog-kill.ll
|
…
|
|
no-sse2-avg.ll
|
…
|
|
nobt.ll
|
…
|
|
nocx16.ll
|
…
|
|
non-lazy-bind.ll
|
…
|
|
non-unique-sections.ll
|
…
|
|
nonconst-static-ev.ll
|
…
|
|
nonconst-static-iv.ll
|
…
|
|
nontemporal-2.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
nontemporal-loads.ll
|
[AVX-512] Fix the 128-bit and 256-bit nontemporal load patterns with elements type other than i64. These loads have all been promoted to v2i64/v4i64 loads so we need bitcasts or we end up selecting VMOVDQA32/VMOVDQU32 instead.
|
2016-08-11 06:04:00 +00:00 |
nontemporal.ll
|
…
|
|
noreturn-call.ll
|
…
|
|
norex-subreg.ll
|
…
|
|
nosse-error1.ll
|
…
|
|
nosse-error2.ll
|
…
|
|
nosse-varargs.ll
|
…
|
|
nosse-vector.ll
|
[X86][X87] Add vector arithmetic tests for targets with sse disabled
|
2016-07-30 16:01:30 +00:00 |
not-and-simplify.ll
|
[TargetLowering] add special-case for demanded bits analysis of 'not'
|
2016-12-05 15:58:21 +00:00 |
note-sections.ll
|
Mark ELF sections whose name start with .note as note
|
2016-09-20 20:21:13 +00:00 |
null-streamer.ll
|
Renumber testcase metadata nodes after r290153.
|
2016-12-22 00:45:21 +00:00 |
objc-gc-module-flags.ll
|
…
|
|
object-size.ll
|
…
|
|
oddshuffles.ll
|
[X86][SSE] Add support for combining target shuffles to SHUFPS.
|
2016-12-18 14:26:02 +00:00 |
opaque-constant-asm.ll
|
…
|
|
opt-ext-uses.ll
|
…
|
|
opt-shuff-tstore.ll
|
…
|
|
optimize-max-0.ll
|
…
|
|
optimize-max-1.ll
|
…
|
|
optimize-max-2.ll
|
…
|
|
optimize-max-3.ll
|
…
|
|
or-address.ll
|
…
|
|
or-branch.ll
|
…
|
|
or-lea.ll
|
…
|
|
osx-private-labels.ll
|
…
|
|
overlap-shift.ll
|
…
|
|
packed_struct.ll
|
…
|
|
packss.ll
|
[SelectionDAG] Add ComputeNumSignBits support for CONCAT_VECTORS opcode
|
2016-11-21 14:36:19 +00:00 |
palignr.ll
|
[x86] use a single shufps when it can save instructions
|
2016-12-15 18:03:38 +00:00 |
partial-fold32.ll
|
[X86] Allow folding of stack reloads when loading a subreg of the spilled reg
|
2016-11-23 18:33:49 +00:00 |
partial-fold64.ll
|
[X86] Allow folding of stack reloads when loading a subreg of the spilled reg
|
2016-11-23 18:33:49 +00:00 |
pass-three.ll
|
…
|
|
patchable-prologue.ll
|
…
|
|
patchpoint-invoke.ll
|
[Stackmap] Added callsite counts to emitted function information.
|
2016-09-14 20:22:03 +00:00 |
patchpoint-verifiable.mir
|
MIRParser: Use shorter cfi identifiers
|
2016-07-26 18:20:00 +00:00 |
patchpoint-webkit_jscc.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
patchpoint.ll
|
…
|
|
peep-setb.ll
|
…
|
|
peep-test-0.ll
|
…
|
|
peep-test-1.ll
|
…
|
|
peep-test-2.ll
|
…
|
|
peep-test-3.ll
|
…
|
|
peep-test-4.ll
|
…
|
|
peephole-cvt-sse.ll
|
[X86] Loosen memory folding requirements for cvtdq2pd and cvtps2pd instructions.
|
2016-09-01 18:50:02 +00:00 |
peephole-fold-movsd.ll
|
…
|
|
peephole-multiple-folds.ll
|
…
|
|
peephole-na-phys-copy-folding.ll
|
…
|
|
peephole.mir
|
PeepholeOptimizer: Do not replace SubregToReg(bitcast like)
|
2017-01-09 21:38:17 +00:00 |
personality.ll
|
…
|
|
personality_size.ll
|
…
|
|
phaddsub.ll
|
[X86] Don't allow commuting to form phsub operations.
|
2017-01-21 06:59:38 +00:00 |
phi-bit-propagation.ll
|
…
|
|
phi-immediate-factoring.ll
|
[CodeGenPrep] Skip merging empty case blocks
|
2016-12-16 20:38:39 +00:00 |
phielim-split.ll
|
…
|
|
phys-reg-local-regalloc.ll
|
…
|
|
phys_subreg_coalesce-2.ll
|
Using branch probability to guide critical edge splitting.
|
2016-10-20 18:06:52 +00:00 |
phys_subreg_coalesce-3.ll
|
…
|
|
phys_subreg_coalesce.ll
|
…
|
|
pic-load-remat.ll
|
…
|
|
pic.ll
|
…
|
|
pic_jumptable.ll
|
…
|
|
pie.ll
|
…
|
|
pku.ll
|
…
|
|
pmovext.ll
|
…
|
|
pmovsx-inreg.ll
|
[X86][SSE] Regenerated chained pmovsx store tests and added i686 tests
|
2016-10-21 15:51:24 +00:00 |
pmul.ll
|
[X86][SSE] Improve lowering of vXi64 multiplies
|
2016-12-21 20:00:10 +00:00 |
pmulld.ll
|
…
|
|
pointer-vector.ll
|
[X86][SSE] Regenerate vector of pointers tests
|
2016-12-13 17:22:39 +00:00 |
pop-stack-cleanup.ll
|
…
|
|
popcnt.ll
|
[X86] Regenerated popcnt scalar tests for 32/64-bit targets with/without POPCNT support
|
2016-07-17 16:04:19 +00:00 |
post-ra-sched.ll
|
…
|
|
postalloc-coalescing.ll
|
…
|
|
postra-licm.ll
|
…
|
|
powi.ll
|
…
|
|
pr1462.ll
|
…
|
|
pr1489.ll
|
…
|
|
pr1505.ll
|
…
|
|
pr1505b.ll
|
…
|
|
pr2177.ll
|
…
|
|
pr2182.ll
|
…
|
|
pr2326.ll
|
…
|
|
pr2585.ll
|
…
|
|
pr2656.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
pr2659.ll
|
Using branch probability to guide critical edge splitting.
|
2016-10-20 18:06:52 +00:00 |
pr2849.ll
|
…
|
|
pr2924.ll
|
…
|
|
pr2982.ll
|
…
|
|
pr3154.ll
|
…
|
|
pr3216.ll
|
…
|
|
pr3241.ll
|
…
|
|
pr3243.ll
|
…
|
|
pr3244.ll
|
…
|
|
pr3250.ll
|
…
|
|
pr3317.ll
|
…
|
|
pr3366.ll
|
…
|
|
pr3457.ll
|
…
|
|
pr3522.ll
|
…
|
|
pr5145.ll
|
…
|
|
pr7882.ll
|
…
|
|
pr9127.ll
|
…
|
|
pr9743.ll
|
…
|
|
pr10068.ll
|
…
|
|
pr10475.ll
|
…
|
|
pr10499.ll
|
…
|
|
pr10523.ll
|
…
|
|
pr10524.ll
|
…
|
|
pr10525.ll
|
…
|
|
pr10526.ll
|
…
|
|
pr11202.ll
|
Codegen: Tail-duplicate during placement.
|
2016-10-11 20:36:43 +00:00 |
pr11334.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
pr11415.ll
|
…
|
|
pr11468.ll
|
…
|
|
pr11985.ll
|
…
|
|
pr11998.ll
|
…
|
|
pr12312.ll
|
…
|
|
pr12360.ll
|
…
|
|
pr12889.ll
|
…
|
|
pr13209.ll
|
…
|
|
pr13220.ll
|
…
|
|
pr13458.ll
|
…
|
|
pr13577.ll
|
[X86][SSE][AVX-512] Convert FAND/FOR/FXOR/FANDN nodes to integer operations if they are available. This will allow a bunch of patterns to be removed.
|
2016-12-18 07:54:23 +00:00 |
pr13859.ll
|
…
|
|
pr13899.ll
|
…
|
|
pr14088.ll
|
…
|
|
pr14098.ll
|
…
|
|
pr14161.ll
|
…
|
|
pr14204.ll
|
[x86] auto-generate checks
|
2016-10-10 22:04:12 +00:00 |
pr14314.ll
|
…
|
|
pr14333.ll
|
…
|
|
pr14562.ll
|
…
|
|
pr15267.ll
|
…
|
|
pr15296.ll
|
…
|
|
pr15309.ll
|
…
|
|
pr16031.ll
|
…
|
|
pr16360.ll
|
…
|
|
pr16807.ll
|
…
|
|
pr17546.ll
|
…
|
|
pr17631.ll
|
…
|
|
pr17764.ll
|
…
|
|
pr18014.ll
|
[x86] auto-generate checks
|
2016-10-10 22:01:42 +00:00 |
pr18023.ll
|
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
|
2016-12-14 16:43:44 +00:00 |
pr18054.ll
|
…
|
|
pr18162.ll
|
…
|
|
pr18846.ll
|
…
|
|
pr19049.ll
|
…
|
|
pr20020.ll
|
…
|
|
pr20088.ll
|
…
|
|
pr21099.ll
|
…
|
|
pr21792.ll
|
[SelectionDAG] Add ability for computeKnownBits to peek through bitcasts from 'large element' scalar/vector to 'small element' vector.
|
2016-12-10 17:00:00 +00:00 |
pr22019.ll
|
…
|
|
pr22103.ll
|
…
|
|
pr22774.ll
|
[X86] Regenerate test. NFC.
|
2016-09-09 21:36:17 +00:00 |
pr23103.ll
|
…
|
|
pr23246.ll
|
…
|
|
pr23273.ll
|
…
|
|
pr23603.ll
|
…
|
|
pr23664.ll
|
…
|
|
pr24139.ll
|
…
|
|
pr24374.ll
|
Win64: Don't emit unwind info for "leaf" functions (PR30337)
|
2016-09-22 19:50:05 +00:00 |
pr24602.ll
|
…
|
|
pr25828.ll
|
…
|
|
pr26350.ll
|
…
|
|
pr26625.ll
|
…
|
|
pr26652.ll
|
…
|
|
pr26757.ll
|
…
|
|
pr26835.ll
|
…
|
|
pr26870.ll
|
…
|
|
pr27071.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
pr27501.ll
|
…
|
|
pr27591.ll
|
[X86,AVX-512] Use INSERT_SUBREG instead of SUBREG_TO_REG when the input is not the output of an instruction.
|
2016-09-19 02:53:43 +00:00 |
pr27681.mir
|
MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, compute it
|
2016-08-25 01:27:13 +00:00 |
pr28173.ll
|
AVX-512: Fix for PR28175 - Scalar code optimization.
|
2016-09-13 07:57:00 +00:00 |
pr28444.ll
|
…
|
|
pr28472.ll
|
…
|
|
pr28489.ll
|
…
|
|
pr28504.ll
|
[DAGCombine] Make sext(setcc) combine respect getBooleanContents
|
2016-08-01 19:39:49 +00:00 |
pr28515.ll
|
…
|
|
pr28560.ll
|
ExpandPostRAPseudos should transfer implicit uses, not only implicit defs
|
2016-07-15 22:31:14 +00:00 |
pr28824.ll
|
Make TwoAddressInstructionPass::rescheduleMIBelowKill subreg-aware
|
2016-08-11 17:38:33 +00:00 |
pr29010.ll
|
Fix for PR29010
|
2016-08-17 19:07:40 +00:00 |
pr29022.ll
|
[X86] Optimization for replacing LEA with MOV at frame index elimination time
|
2016-09-26 06:42:07 +00:00 |
pr29112.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
pr29170.ll
|
[Legalizer] Don't throw away false low half when expanding GT/LT SETCC
|
2016-09-01 23:02:32 +00:00 |
pr30430.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
pr30511.ll
|
[X86][SSE] Add support for combining target shuffles to SHUFPS.
|
2016-12-18 14:26:02 +00:00 |
pr30693.ll
|
[X86] Broadcast from memory intructions aren't unfoldable
|
2016-11-04 15:15:19 +00:00 |
pr30813.ll
|
Add triple to test so it does not fail on windows.
|
2016-10-31 11:40:14 +00:00 |
pr31143.ll
|
[X86] Fix non-intrinsic roundss/roundsd to not read the destination register
|
2016-12-05 20:57:37 +00:00 |
pr31242.ll
|
[X86] Skip over DEBUG_VALUE while looking for start of call sequence
|
2016-12-07 19:31:08 +00:00 |
pr31271.ll
|
[X86] Do not assume "ri" instructions always have an immediate operand
|
2016-12-07 19:29:18 +00:00 |
pr31323.ll
|
[SelectionDAG] Add knownbits support for EXTRACT_VECTOR_ELT opcodes (REAPPLIED)
|
2016-12-09 17:53:11 +00:00 |
pre-coalesce-2.ll
|
[RegisterCoalescing] Recommit the patch "Remove partial redundent copy".
|
2017-01-20 17:38:54 +00:00 |
pre-coalesce.ll
|
[RegisterCoalescing] Recommit the patch "Remove partial redundent copy".
|
2017-01-20 17:38:54 +00:00 |
pre-coalesce.mir
|
[RegisterCoalescing] Recommit the patch "Remove partial redundent copy".
|
2017-01-20 17:38:54 +00:00 |
pre-ra-sched.ll
|
…
|
|
prefetch.ll
|
…
|
|
prefixdata.ll
|
…
|
|
preserve_allcc64.ll
|
…
|
|
preserve_mostcc64.ll
|
…
|
|
private-2.ll
|
…
|
|
private.ll
|
…
|
|
prolog-push-seq.ll
|
…
|
|
prologuedata.ll
|
…
|
|
promote-assert-zext.ll
|
…
|
|
promote-i16.ll
|
…
|
|
promote-trunc.ll
|
…
|
|
promote-vec3.ll
|
Fix *_EXTEND_VECTOR_INREG legalization
|
2016-10-20 17:56:36 +00:00 |
promote.ll
|
…
|
|
ps4-noreturn.ll
|
…
|
|
pseudo_cmov_lower.ll
|
…
|
|
pseudo_cmov_lower1.ll
|
…
|
|
pseudo_cmov_lower2.ll
|
Lower consecutive select instructions correctly.
|
2016-09-12 20:23:28 +00:00 |
pshufb-mask-comments.ll
|
[X86][SSE] Consistently set MOVD/MOVQ load/store/move instructions to integer domain
|
2016-12-07 12:10:49 +00:00 |
pshufd-combine-crash.ll
|
…
|
|
psubus.ll
|
[SelectionDAG] ComputeNumSignBits of TRUNCATE operations
|
2016-11-22 11:29:19 +00:00 |
ptr-rotate.ll
|
…
|
|
ptrtoint-constexpr.ll
|
…
|
|
push-cfi-debug.ll
|
…
|
|
push-cfi-obj.ll
|
…
|
|
push-cfi.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
ragreedy-bug.ll
|
Codegen: Tail-duplicate during placement.
|
2016-10-11 20:36:43 +00:00 |
ragreedy-hoist-spill.ll
|
[CodeGenPrep] Skip merging empty case blocks
|
2016-12-16 20:38:39 +00:00 |
ragreedy-last-chance-recoloring.ll
|
…
|
|
rd-mod-wr-eflags.ll
|
…
|
|
rdpmc.ll
|
…
|
|
rdrand.ll
|
…
|
|
rdseed.ll
|
…
|
|
rdtsc.ll
|
…
|
|
read-fp-no-frame-pointer.ll
|
…
|
|
recip-fastmath.ll
|
[X86][SSE] Add SSE reciprocal estimate tests
|
2016-11-21 15:28:21 +00:00 |
recip-fastmath2.ll
|
Extra coverage tests to demonstrate fixes in D72618 and D26855
|
2016-12-16 09:56:02 +00:00 |
red-zone.ll
|
…
|
|
red-zone2.ll
|
…
|
|
reduce-trunc-shl.ll
|
[x86] use a single shufps when it can save instructions
|
2016-12-15 18:03:38 +00:00 |
regalloc-reconcile-broken-hints.ll
|
…
|
|
regalloc-spill-at-ehpad.ll
|
…
|
|
reghinting.ll
|
…
|
|
regpressure.ll
|
…
|
|
rem.ll
|
…
|
|
rem_crash.ll
|
…
|
|
remat-constant.ll
|
…
|
|
remat-fold-load.ll
|
…
|
|
remat-mov-0.ll
|
…
|
|
remat-phys-dead.ll
|
…
|
|
remat-scalar-zero.ll
|
…
|
|
ret-addr.ll
|
…
|
|
ret-i64-0.ll
|
…
|
|
ret-mmx.ll
|
[X86] Regenerate x64 mmx/f64 return value tests
|
2016-09-04 18:14:45 +00:00 |
return-ext.ll
|
…
|
|
return_zeroext_i2.ll
|
…
|
|
returned-trunc-tail-calls.ll
|
…
|
|
reverse_branches.ll
|
…
|
|
rip-rel-address.ll
|
…
|
|
rip-rel-lea.ll
|
…
|
|
rodata-relocs.ll
|
…
|
|
rot16.ll
|
…
|
|
rot32.ll
|
…
|
|
rot64.ll
|
…
|
|
rotate.ll
|
[X86] Prefer rotate by 1 over rotate by imm
|
2016-10-10 14:43:55 +00:00 |
rotate2.ll
|
…
|
|
rotate4.ll
|
…
|
|
rounding-ops.ll
|
…
|
|
rrlist-livereg-corrutpion.ll
|
…
|
|
rtm.ll
|
…
|
|
sad.ll
|
Revert r282835 "[AVX-512] Always use the full 32 register vector classes for addRegisterClass regardless of whether AVX512/VLX is enabled or not."
|
2016-09-30 05:35:42 +00:00 |
saddo-redundant-add.ll
|
…
|
|
safestack.ll
|
…
|
|
safestack_ssp.ll
|
…
|
|
sandybridge-loads.ll
|
…
|
|
sar_fold.ll
|
…
|
|
sar_fold64.ll
|
remove FIXME comment (fixed with r284424); NFC
|
2016-10-17 21:08:39 +00:00 |
scalar-extract.ll
|
…
|
|
scalar-fp-to-i64.ll
|
…
|
|
scalar-int-to-fp.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
scalar-min-max-fill-operand.ll
|
…
|
|
scalar_sse_minmax.ll
|
…
|
|
scalar_widen_div.ll
|
…
|
|
scalarize-bitcast.ll
|
…
|
|
scev-interchange.ll
|
…
|
|
scheduler-backtracking.ll
|
…
|
|
sdiv-exact.ll
|
…
|
|
sdiv-pow2.ll
|
…
|
|
segmented-stacks-dynamic.ll
|
…
|
|
segmented-stacks.ll
|
…
|
|
seh-catch-all-win32.ll
|
…
|
|
seh-catch-all.ll
|
…
|
|
seh-catchpad.ll
|
Don't emit .seh_handler directives for any cleanup funclets
|
2016-12-08 20:38:46 +00:00 |
seh-except-finally.ll
|
…
|
|
seh-exception-code.ll
|
…
|
|
seh-filter-no-personality.ll
|
…
|
|
seh-finally.ll
|
…
|
|
seh-no-invokes.ll
|
[SEH] Emit the parent frame offset label even if there are no funclets
|
2016-09-30 22:10:12 +00:00 |
seh-safe-div-win32.ll
|
…
|
|
seh-safe-div.ll
|
…
|
|
seh-stack-realign.ll
|
…
|
|
select-with-and-or.ll
|
[x86, AVX] allow FP vector select folding to bitwise logic ops (PR28895)
|
2016-08-10 19:00:11 +00:00 |
select.ll
|
DAGCombiner: fix combine of trunc and select
|
2016-11-15 07:55:22 +00:00 |
select_const.ll
|
[x86] add tests for {-1,0,1} select of constants
|
2016-10-24 19:13:29 +00:00 |
select_meta.ll
|
Fix some broken CHECK lines.
|
2017-01-22 20:28:56 +00:00 |
selectiondag-crash.ll
|
…
|
|
selectiondag-cse.ll
|
…
|
|
selectiondag-order.ll
|
[DAG] Don't increase SDNodeOrder for dbg.value/declare.
|
2017-01-19 13:55:55 +00:00 |
setcc-combine.ll
|
…
|
|
setcc-lowering.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
setcc-narrowing.ll
|
…
|
|
setcc-sentinals.ll
|
…
|
|
setcc.ll
|
[x86] regenerate checks
|
2016-09-14 20:21:28 +00:00 |
setjmp-spills.ll
|
…
|
|
setoeq.ll
|
…
|
|
setuge.ll
|
…
|
|
sext-i1.ll
|
[x86] regenerate checks
|
2016-09-14 19:42:03 +00:00 |
sext-load.ll
|
…
|
|
sext-ret-val.ll
|
…
|
|
sext-setcc-self.ll
|
…
|
|
sext-subreg.ll
|
…
|
|
sext-trunc.ll
|
…
|
|
sfence.ll
|
…
|
|
sha.ll
|
…
|
|
shift-and.ll
|
…
|
|
shift-avx2-crash.ll
|
…
|
|
shift-bmi2.ll
|
…
|
|
shift-coalesce.ll
|
…
|
|
shift-codegen.ll
|
…
|
|
shift-combine-crash.ll
|
…
|
|
shift-combine.ll
|
[X86] Regenerated shift combine tests.
|
2016-09-13 14:41:39 +00:00 |
shift-double-x86_64.ll
|
[X86] Improve 64-bit shifts on 32-bit targets (PR14593)
|
2016-07-31 19:50:45 +00:00 |
shift-double.ll
|
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
|
2017-01-11 19:55:19 +00:00 |
shift-folding.ll
|
…
|
|
shift-i128.ll
|
[X86] Added i128 lshr+shl -> mask combine test
|
2016-09-14 14:29:16 +00:00 |
shift-i256.ll
|
…
|
|
shift-one.ll
|
…
|
|
shift-pair.ll
|
…
|
|
shift-parts.ll
|
…
|
|
shift-pcmp.ll
|
[DAGCombiner] Fix infinite loop in vector mul/shl combining
|
2016-11-23 16:05:51 +00:00 |
shl-anyext.ll
|
…
|
|
shl-crash-on-legalize.ll
|
Shift-left (ISD::SHL) operation crashes on "DAG Legalization" phase.
|
2016-09-07 20:54:33 +00:00 |
shl-i64.ll
|
…
|
|
shl_elim.ll
|
…
|
|
shl_undef.ll
|
…
|
|
shrink-compare.ll
|
X86: Fold tail calls into conditional branches also for 64-bit (PR26302)
|
2016-09-09 22:37:27 +00:00 |
shrink-fp-const1.ll
|
…
|
|
shrink-fp-const2.ll
|
…
|
|
shrink-wrap-chkstk.ll
|
…
|
|
shrink_vmul.ll
|
[X86][SSE] Improve lowering of vXi64 multiplies
|
2016-12-21 20:00:10 +00:00 |
shrink_vmul_sse.ll
|
Rename test pr30298.ll to shrink_vmul_sse.ll, to make the name more meaningful, NFC.
|
2016-09-07 18:46:15 +00:00 |
shrinkwrap-hang.ll
|
…
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shuffle-combine-crash.ll
|
…
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shuffle-vs-trunc-128.ll
|
[X86] Add test cases that cover pr31551. NFC.
|
2017-01-05 16:48:28 +00:00 |
shuffle-vs-trunc-256.ll
|
[X86] Add test cases that cover pr31551. NFC.
|
2017-01-05 16:48:28 +00:00 |
shuffle-vs-trunc-512.ll
|
[X86] Add test cases that cover pr31551. NFC.
|
2017-01-05 16:48:28 +00:00 |
sibcall-2.ll
|
…
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sibcall-3.ll
|
…
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sibcall-4.ll
|
…
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sibcall-5.ll
|
…
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sibcall-6.ll
|
…
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sibcall-byval.ll
|
…
|
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sibcall-win64.ll
|
…
|
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sibcall.ll
|
…
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|
simple-zext.ll
|
…
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sincos-opt.ll
|
…
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sincos.ll
|
…
|
|
sink-blockfreq.ll
|
…
|
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sink-cheap-instructions.ll
|
…
|
|
sink-hoist.ll
|
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
|
2017-01-11 19:55:19 +00:00 |
sink-out-of-loop.ll
|
…
|
|
sjlj-baseptr.ll
|
…
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sjlj-eh.ll
|
…
|
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sjlj.ll
|
…
|
|
slow-incdec.ll
|
…
|
|
slow-pmulld.ll
|
Remove an overeager assert from r288844.
|
2017-01-17 19:29:15 +00:00 |
slow-unaligned-mem.ll
|
AMD family 17h (znver1) enablement
|
2017-01-10 06:01:16 +00:00 |
small-byval-memcpy.ll
|
…
|
|
smul-with-overflow.ll
|
…
|
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soft-fp.ll
|
…
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|
soft-sitofp.ll
|
…
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splat-const.ll
|
…
|
|
splat-for-size.ll
|
[X86] Cleanup patterns for using VMOVDDUP for broadcasts.
|
2016-10-01 07:11:24 +00:00 |
split-eh-lpad-edges.ll
|
…
|
|
split-store.ll
|
Redo store splitting in CodeGenPrepare.
|
2016-12-22 19:44:45 +00:00 |
split-vector-bitcast.ll
|
…
|
|
split-vector-rem.ll
|
…
|
|
sqrt-fastmath-mir.ll
|
[X86] Remove scalar logical op alias instructions. Just use COPY_FROM/TO_REGCLASS and the normal packed instructions instead
|
2016-12-06 04:58:39 +00:00 |
sqrt-fastmath-tune.ll
|
[X86] Heuristic to selectively build Newton-Raphson SQRT estimation
|
2016-08-04 12:47:28 +00:00 |
sqrt-fastmath.ll
|
[X86][SSE] Add SSE reciprocal estimate tests
|
2016-11-21 15:28:21 +00:00 |
sqrt.ll
|
…
|
|
sret-implicit.ll
|
…
|
|
sse-align-0.ll
|
…
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sse-align-1.ll
|
…
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sse-align-2.ll
|
…
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sse-align-3.ll
|
…
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sse-align-4.ll
|
…
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sse-align-5.ll
|
…
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sse-align-6.ll
|
…
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sse-align-7.ll
|
…
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sse-align-8.ll
|
…
|
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sse-align-9.ll
|
…
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sse-align-10.ll
|
…
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sse-align-11.ll
|
…
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sse-align-12.ll
|
…
|
|
sse-commute.ll
|
…
|
|
sse-domains.ll
|
…
|
|
sse-fcopysign.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
sse-fsignum.ll
|
[AVX-512] Add patterns to use a zero masked VPTERNLOG instruction for vselects of all ones and all zeros.
|
2017-01-09 02:44:34 +00:00 |
sse-intel-ocl.ll
|
[X86] Optimization for replacing LEA with MOV at frame index elimination time
|
2016-09-26 06:42:07 +00:00 |
sse-intrinsics-fast-isel-x86_64.ll
|
[X86][SSE] Reimplement SSE fp2si conversion intrinsics instead of using generic IR
|
2016-07-19 15:07:43 +00:00 |
sse-intrinsics-fast-isel.ll
|
[X86] Optimization for replacing LEA with MOV at frame index elimination time
|
2016-09-26 06:42:07 +00:00 |
sse-intrinsics-x86-upgrade.ll
|
[X86] Remove the scalar intrinsics for fadd/fsub/fdiv/fmul
|
2016-11-16 05:24:10 +00:00 |
sse-intrinsics-x86.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
sse-load-ret.ll
|
…
|
|
sse-minmax.ll
|
Regenerate test with update_llc_test_checks.py
|
2017-01-13 16:37:38 +00:00 |
sse-only.ll
|
…
|
|
sse-regcall.ll
|
Fix line endings
|
2016-10-19 11:16:58 +00:00 |
sse-scalar-fp-arith-unary.ll
|
…
|
|
sse-scalar-fp-arith.ll
|
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
|
2017-01-11 19:55:19 +00:00 |
sse-unaligned-mem-feature.ll
|
…
|
|
sse-varargs.ll
|
…
|
|
sse1.ll
|
[x86] avoid crashing with illegal vector type (PR31672)
|
2017-01-22 17:06:12 +00:00 |
sse2-intrinsics-fast-isel-x86_64.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
sse2-intrinsics-fast-isel.ll
|
[X86] Fix PR30926 - Add patterns for (v)cvtsi2s{s,d} and (v)cvtsd2s{s,d}
|
2017-01-11 09:11:48 +00:00 |
sse2-intrinsics-x86-upgrade.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
sse2-intrinsics-x86.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
sse2-vector-shifts.ll
|
…
|
|
sse2.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
sse3-avx-addsub-2.ll
|
[X86][SSE] Avoid specifying unused arguments in SHUFPD lowering
|
2016-08-22 12:56:54 +00:00 |
sse3-avx-addsub.ll
|
Fix blend mask by switch the side of the operand since Blend node uses opposite mask then Select NODE.
|
2017-01-15 16:43:14 +00:00 |
sse3-intrinsics-fast-isel.ll
|
…
|
|
sse3-intrinsics-x86.ll
|
[AVX-512] Add -show-mc-encoding to legacy vector intrinsic tests so we can see when VEX or EVEX encoded instructions are being emitted. Make sure the tests all have an avx2 command line and an skx command line.
|
2016-11-06 02:03:58 +00:00 |
sse3.ll
|
…
|
|
sse4a-intrinsics-fast-isel.ll
|
…
|
|
sse4a-upgrade.ll
|
…
|
|
sse4a.ll
|
[X86][SSE4A] The EXTRQ/INSERTQ bit extraction/insertion ops should be in the integer domain
|
2016-08-26 09:55:41 +00:00 |
sse41-intrinsics-fast-isel.ll
|
…
|
|
sse41-intrinsics-x86-upgrade.ll
|
…
|
|
sse41-intrinsics-x86.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
sse41-pmovxrm.ll
|
[AVX-512] Add an AVX512VL/BW command line to sse41-pmovxrm.ll and avx2-pmovxrm.ll. Also disable peephole so we really test pattern matching.
|
2016-10-10 06:25:42 +00:00 |
sse41.ll
|
[X86][SSE] Always combine target shuffles to MOVSD/MOVSS
|
2016-10-01 15:33:01 +00:00 |
sse42-intrinsics-fast-isel-x86_64.ll
|
…
|
|
sse42-intrinsics-fast-isel.ll
|
…
|
|
sse42-intrinsics-x86.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
sse42.ll
|
…
|
|
sse42_64.ll
|
…
|
|
sse_partial_update.ll
|
[X86] Remove some intrinsic instructions from hasPartialRegUpdate
|
2016-12-12 05:07:17 +00:00 |
sse_reload_fold.ll
|
…
|
|
ssp-data-layout.ll
|
…
|
|
ssp-guard-spill.ll
|
…
|
|
ssse3-intrinsics-fast-isel.ll
|
…
|
|
ssse3-intrinsics-x86.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
stack-align-memcpy.ll
|
…
|
|
stack-align.ll
|
…
|
|
stack-align2.ll
|
…
|
|
stack-folding-3dnow.ll
|
…
|
|
stack-folding-adx-x86_64.ll
|
…
|
|
stack-folding-fp-avx1.ll
|
[X86][SSE] Force execution domain of 32-bit extractps/pextrd in the stack folding tests
|
2016-12-07 15:06:14 +00:00 |
stack-folding-fp-avx512.ll
|
[X86] Add masked versions of VPERMT2* and VPERMI2* to load folding tables.
|
2016-12-09 05:20:11 +00:00 |
stack-folding-fp-avx512vl.ll
|
[AVX-512] Teach EVEX to VEX conversion pass to handle VINSERT and VEXTRACT instructions.
|
2017-01-03 05:46:18 +00:00 |
stack-folding-fp-sse42.ll
|
[X86][SSE] Force execution domain of 32-bit extractps/pextrd in the stack folding tests
|
2016-12-07 15:06:14 +00:00 |
stack-folding-int-avx1.ll
|
[X86][SSE] Fix vpextrd/vpextrq checks
|
2016-12-07 15:10:05 +00:00 |
stack-folding-int-avx2.ll
|
…
|
|
stack-folding-int-avx512.ll
|
[AVX-512] Add all forms of VPALIGNR, VALIGND, and VALIGNQ to the load folding tables.
|
2016-12-27 06:51:09 +00:00 |
stack-folding-int-avx512vl.ll
|
[AVX-512] Teach EVEX to VEX conversion pass to handle VINSERT and VEXTRACT instructions.
|
2017-01-03 05:46:18 +00:00 |
stack-folding-int-sse42.ll
|
[X86][SSE] Force execution domain of 32-bit extractps/pextrd in the stack folding tests
|
2016-12-07 15:06:14 +00:00 |
stack-folding-mmx.ll
|
…
|
|
stack-folding-x86_64.ll
|
…
|
|
stack-folding-xop.ll
|
…
|
|
stack-probe-size.ll
|
…
|
|
stack-protector-dbginfo.ll
|
…
|
|
stack-protector-msvc.ll
|
…
|
|
stack-protector-target.ll
|
…
|
|
stack-protector-vreg-to-vreg-copy.ll
|
…
|
|
stack-protector-weight.ll
|
…
|
|
stack-protector.ll
|
Recommit r288212: Emit 'no line' information for interesting 'orphan' instructions.
|
2016-12-12 20:49:11 +00:00 |
stack-update-frame-opcode.ll
|
…
|
|
stack_guard_remat.ll
|
…
|
|
stackguard-internal.ll
|
…
|
|
stackmap-fast-isel.ll
|
[Stackmap] Added callsite counts to emitted function information.
|
2016-09-14 20:22:03 +00:00 |
stackmap-frame-setup.ll
|
…
|
|
stackmap-large-constants.ll
|
[Stackmap] Added callsite counts to emitted function information.
|
2016-09-14 20:22:03 +00:00 |
stackmap-liveness.ll
|
[Stackmap] Added callsite counts to emitted function information.
|
2016-09-14 20:22:03 +00:00 |
stackmap-nops.ll
|
…
|
|
stackmap-shadow-optimization.ll
|
…
|
|
stackmap.ll
|
[peephole] Enhance folding logic to work for STATEPOINTs
|
2016-12-13 01:38:41 +00:00 |
stackpointer.ll
|
…
|
|
statepoint-allocas.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
statepoint-call-lowering.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
statepoint-far-call.ll
|
…
|
|
statepoint-forward.ll
|
…
|
|
statepoint-gctransition-call-lowering.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
statepoint-invoke.ll
|
…
|
|
statepoint-live-in.ll
|
[peephole] Enhance folding logic to work for STATEPOINTs
|
2016-12-13 01:38:41 +00:00 |
statepoint-stack-usage.ll
|
[Statepoints] Reuse stack slots more than once within a basic block
|
2016-12-13 01:21:15 +00:00 |
statepoint-stackmap-format.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
statepoint-uniqueing.ll
|
…
|
|
statepoint-vector-bad-spill.ll
|
…
|
|
statepoint-vector.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
stdarg.ll
|
…
|
|
stdcall-notailcall.ll
|
…
|
|
stdcall.ll
|
…
|
|
store-empty-member.ll
|
…
|
|
store-fp-constant.ll
|
…
|
|
store-global-address.ll
|
…
|
|
store-narrow.ll
|
…
|
|
store-zero-and-minus-one.ll
|
…
|
|
store_op_load_fold.ll
|
…
|
|
store_op_load_fold2.ll
|
…
|
|
stores-merging.ll
|
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
|
2016-12-14 16:43:44 +00:00 |
storetrunc-fp.ll
|
…
|
|
stride-nine-with-base-reg.ll
|
…
|
|
stride-reuse.ll
|
…
|
|
sub-with-overflow.ll
|
…
|
|
sub.ll
|
…
|
|
subreg-to-reg-0.ll
|
…
|
|
subreg-to-reg-1.ll
|
…
|
|
subreg-to-reg-2.ll
|
…
|
|
subreg-to-reg-3.ll
|
…
|
|
subreg-to-reg-4.ll
|
…
|
|
subreg-to-reg-6.ll
|
…
|
|
subvector-broadcast.ll
|
[AVX-512] Use VSHUF instructions instead of two inserts as fallback for subvector broadcasts that can't fold the load.
|
2017-01-19 02:34:29 +00:00 |
sunkaddr-ext.ll
|
…
|
|
swift-return.ll
|
More swift calling convention tests
|
2016-10-28 17:21:05 +00:00 |
swifterror.ll
|
More swift calling convention tests
|
2016-10-28 17:21:05 +00:00 |
swiftself.ll
|
…
|
|
switch-bt.ll
|
…
|
|
switch-crit-edge-constant.ll
|
…
|
|
switch-default-only.ll
|
…
|
|
switch-density.ll
|
…
|
|
switch-edge-weight.ll
|
…
|
|
switch-jump-table.ll
|
…
|
|
switch-or.ll
|
…
|
|
switch-order-weight.ll
|
…
|
|
switch-zextload.ll
|
…
|
|
switch.ll
|
…
|
|
swizzle-2.ll
|
…
|
|
swizzle-avx2.ll
|
…
|
|
system-intrinsics-64-xsave.ll
|
…
|
|
system-intrinsics-64-xsavec.ll
|
…
|
|
system-intrinsics-64-xsaveopt.ll
|
…
|
|
system-intrinsics-64-xsaves.ll
|
…
|
|
system-intrinsics-64.ll
|
…
|
|
system-intrinsics-xgetbv.ll
|
[X86] Add xgetbv/xsetbv intrinsics to non-windows platforms
|
2016-08-16 06:41:00 +00:00 |
system-intrinsics-xsave.ll
|
…
|
|
system-intrinsics-xsavec.ll
|
…
|
|
system-intrinsics-xsaveopt.ll
|
…
|
|
system-intrinsics-xsaves.ll
|
…
|
|
system-intrinsics-xsetbv.ll
|
[X86] Add xgetbv/xsetbv intrinsics to non-windows platforms
|
2016-08-16 06:41:00 +00:00 |
system-intrinsics.ll
|
…
|
|
tail-call-attrs.ll
|
…
|
|
tail-call-casts.ll
|
…
|
|
tail-call-conditional.mir
|
CodeGen: Assert that liveness is up to date when reading block live-ins.
|
2017-01-05 20:01:19 +00:00 |
tail-call-got.ll
|
…
|
|
tail-call-legality.ll
|
…
|
|
tail-call-parameter-attrs-mismatch.ll
|
…
|
|
tail-call-win64.ll
|
Win64: Don't use REX prefix for direct tail calls
|
2016-09-08 23:35:10 +00:00 |
tail-dup-addr.ll
|
…
|
|
tail-dup-catchret.ll
|
…
|
|
tail-dup-merge-loop-headers.ll
|
Fix testcases failing after r284036
|
2016-10-12 20:39:33 +00:00 |
tail-dup-repeat.ll
|
Codegen: Tail-duplicate during placement.
|
2016-10-11 20:36:43 +00:00 |
tail-merge-after-mbp.ll
|
[BranchFolding] Change a test case of r278575.
|
2016-08-16 20:06:25 +00:00 |
tail-merge-unreachable.ll
|
Fix some broken CHECK lines.
|
2017-01-22 20:28:56 +00:00 |
tail-merge-wineh.ll
|
…
|
|
tail-opts.ll
|
…
|
|
tail-threshold.ll
|
…
|
|
tailcall-64.ll
|
…
|
|
tailcall-calleesave.ll
|
…
|
|
tailcall-cgp-dup.ll
|
[CGP] Be less conservative about tail-duplicating a ret to allow tail calls
|
2016-09-08 00:48:37 +00:00 |
tailcall-disable.ll
|
…
|
|
tailcall-fastisel.ll
|
…
|
|
tailcall-largecode.ll
|
…
|
|
tailcall-mem-intrinsics.ll
|
…
|
|
tailcall-msvc-conventions.ll
|
…
|
|
tailcall-multiret.ll
|
…
|
|
tailcall-readnone.ll
|
…
|
|
tailcall-returndup-void.ll
|
…
|
|
tailcall-ri64.ll
|
…
|
|
tailcall-stackalign.ll
|
…
|
|
tailcall-structret.ll
|
…
|
|
tailcall.ll
|
…
|
|
tailcallbyval.ll
|
…
|
|
tailcallbyval64.ll
|
…
|
|
tailcallfp.ll
|
…
|
|
tailcallfp2.ll
|
…
|
|
tailcallpic1.ll
|
…
|
|
tailcallpic2.ll
|
…
|
|
tailcallpic3.ll
|
…
|
|
tailcallstack64.ll
|
…
|
|
taildup-crash.ll
|
Testcase for r279022
|
2016-08-18 02:21:54 +00:00 |
targetLoweringGeneric.ll
|
…
|
|
tbm-intrinsics-fast-isel-x86_64.ll
|
…
|
|
tbm-intrinsics-fast-isel.ll
|
…
|
|
tbm-intrinsics-x86_64.ll
|
…
|
|
tbm_patterns.ll
|
…
|
|
test-nofold.ll
|
…
|
|
test-shrink-bug.ll
|
…
|
|
test-shrink.ll
|
…
|
|
testb-je-fusion.ll
|
Revert "CodeGen: Allow small copyable blocks to "break" the CFG."
|
2017-01-11 19:55:19 +00:00 |
testl-commute.ll
|
…
|
|
this-return-64.ll
|
…
|
|
tls-addr-non-leaf-function.ll
|
…
|
|
tls-android-negative.ll
|
…
|
|
tls-android.ll
|
…
|
|
tls-local-dynamic.ll
|
…
|
|
tls-models.ll
|
…
|
|
tls-pic.ll
|
…
|
|
tls-pie.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
tls-shrink-wrapping.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
tls-windows-itanium.ll
|
…
|
|
tls.ll
|
…
|
|
tlv-1.ll
|
…
|
|
tlv-2.ll
|
…
|
|
tlv-3.ll
|
…
|
|
token_landingpad.ll
|
…
|
|
trap.ll
|
…
|
|
trunc-ext-ld-st.ll
|
[X86][SSE] Allow folding of store/zext with PEXTRW of 0'th element
|
2016-07-21 14:54:17 +00:00 |
trunc-store.ll
|
[X86] Regenerate trunc-store legalization test
|
2016-09-04 17:50:03 +00:00 |
trunc-to-bool.ll
|
…
|
|
twoaddr-coalesce-2.ll
|
…
|
|
twoaddr-coalesce-3.ll
|
…
|
|
twoaddr-coalesce.ll
|
…
|
|
twoaddr-lea.ll
|
X86InstrInfo: Update liveness in classifyLea()
|
2016-08-09 01:47:26 +00:00 |
twoaddr-pass-sink.ll
|
…
|
|
twoaddr-sink-terminator.ll
|
…
|
|
uint64-to-float.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
uint_to_fp-2.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
uint_to_fp-3.ll
|
[X86][SSE] Improve recognition of uitofp conversions that can be performed as sitofp
|
2016-09-18 12:45:23 +00:00 |
uint_to_fp.ll
|
…
|
|
umul-with-carry.ll
|
…
|
|
umul-with-overflow.ll
|
…
|
|
unaligned-32-byte-memops.ll
|
…
|
|
unaligned-load.ll
|
…
|
|
unaligned-spill-folding.ll
|
[X86] Add more opcodes to isFrameLoadOpcode/isFrameStoreOpcode. Mainly AVX-512 related.
|
2016-07-18 06:14:39 +00:00 |
undef-label.ll
|
…
|
|
unknown-location.ll
|
[DWARF] Preserve column number when emitting 'line 0' record
|
2016-12-14 00:27:35 +00:00 |
unreachable-loop-sinking.ll
|
…
|
|
unreachableblockelim.ll
|
Fix some broken CHECK lines.
|
2017-01-22 20:28:56 +00:00 |
unused_stackslots.ll
|
…
|
|
unwind-init.ll
|
…
|
|
unwindraise.ll
|
…
|
|
update-terminator.mir
|
Codegen: Tail-duplicate during placement.
|
2016-10-11 20:36:43 +00:00 |
urem-i8-constant.ll
|
…
|
|
urem-power-of-two.ll
|
[DAGCombiner] Try to use SelectionDAG::isKnownToBeAPowerOfTwo instead of just APInt::isPowerOf2
|
2016-12-14 15:08:13 +00:00 |
use-add-flags.ll
|
…
|
|
utf8.ll
|
…
|
|
utf16-cfstrings.ll
|
…
|
|
v2f32.ll
|
…
|
|
v4f32-immediate.ll
|
…
|
|
v4i32load-crash.ll
|
…
|
|
v8i1-masks.ll
|
[TargetLowering] Fix undef vector element issue with true/false result handling
|
2016-11-08 15:07:01 +00:00 |
vaargs.ll
|
…
|
|
vararg-callee-cleanup.ll
|
…
|
|
vararg_no_start.ll
|
…
|
|
vararg_tailcall.ll
|
…
|
|
variable-sized-darwin-bzero.ll
|
…
|
|
variadic-node-pic.ll
|
…
|
|
vastart-defs-eflags.ll
|
…
|
|
vbinop-simplify-bug.ll
|
…
|
|
vec-copysign-avx512.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
vec-copysign.ll
|
[x86, SSE/AVX] allow 128/256-bit lowering for copysign vector intrinsics (PR30433)
|
2016-10-03 16:38:27 +00:00 |
vec-loadsingles-alignment.ll
|
…
|
|
vec-trunc-store.ll
|
[X86][SSE] Regenerate vector load-trunc test
|
2016-10-11 13:55:49 +00:00 |
vec3.ll
|
[TargetLowering] remove fdiv and frem from canOpTrap() (PR29114)
|
2016-08-29 13:32:41 +00:00 |
vec_add.ll
|
…
|
|
vec_align.ll
|
…
|
|
vec_align_i256.ll
|
…
|
|
vec_anyext.ll
|
…
|
|
vec_call.ll
|
…
|
|
vec_cast.ll
|
…
|
|
vec_cast2.ll
|
…
|
|
vec_cmp_sint-128.ll
|
…
|
|
vec_cmp_uint-128.ll
|
…
|
|
vec_compare-sse4.ll
|
…
|
|
vec_compare.ll
|
…
|
|
vec_ctbits.ll
|
[VectorLegalizer] Expansion of CTLZ using CTPOP when possible
|
2016-11-08 14:10:28 +00:00 |
vec_ext_inreg.ll
|
…
|
|
vec_extract-avx.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
vec_extract-mmx.ll
|
[X86][SSE] Add support for combining target shuffles to SHUFPS.
|
2016-12-18 14:26:02 +00:00 |
vec_extract-sse4.ll
|
…
|
|
vec_extract.ll
|
[X86][SSE] Avoid specifying unused arguments in SHUFPD lowering
|
2016-08-22 12:56:54 +00:00 |
vec_fabs.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
vec_floor.ll
|
…
|
|
vec_fneg.ll
|
…
|
|
vec_fp_to_int.ll
|
[AVX-512] Teach EVEX to VEX conversion pass to handle VINSERT and VEXTRACT instructions.
|
2017-01-03 05:46:18 +00:00 |
vec_fpext.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
vec_fptrunc.ll
|
EOL fixes
|
2016-09-04 13:30:46 +00:00 |
vec_i64.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
vec_ins_extract-1.ll
|
DAG: Avoid OOB when legalizing vector indexing
|
2017-01-10 22:02:30 +00:00 |
vec_ins_extract.ll
|
…
|
|
vec_insert-2.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
vec_insert-3.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
vec_insert-4.ll
|
DAG: Avoid OOB when legalizing vector indexing
|
2017-01-10 22:02:30 +00:00 |
vec_insert-5.ll
|
[X86][SSE] Enable commutation between MOVHLPS and UNPCKHPD
|
2016-08-06 18:40:28 +00:00 |
vec_insert-7.ll
|
…
|
|
vec_insert-8.ll
|
DAG: Avoid OOB when legalizing vector indexing
|
2017-01-10 22:02:30 +00:00 |
vec_insert-9.ll
|
…
|
|
vec_insert-mmx.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
vec_int_to_fp.ll
|
[X86] Fix PR30926 - Add patterns for (v)cvtsi2s{s,d} and (v)cvtsd2s{s,d}
|
2017-01-11 09:11:48 +00:00 |
vec_loadsingles.ll
|
…
|
|
vec_logical.ll
|
…
|
|
vec_minmax_match.ll
|
[ValueTracking] recognize variations of 'clamp' to improve codegen (PR31693)
|
2017-01-20 22:18:47 +00:00 |
vec_minmax_sint.ll
|
Revert r291645 "[DAGCombiner] Teach DAG combiner to fold (vselect (N0 xor AllOnes), N1, N2) -> (vselect N0, N2, N1). Only do this if the target indicates its vector boolean type is ZeroOrNegativeOneBooleanContent."
|
2017-01-11 04:59:25 +00:00 |
vec_minmax_uint.ll
|
Revert r291645 "[DAGCombiner] Teach DAG combiner to fold (vselect (N0 xor AllOnes), N1, N2) -> (vselect N0, N2, N1). Only do this if the target indicates its vector boolean type is ZeroOrNegativeOneBooleanContent."
|
2017-01-11 04:59:25 +00:00 |
vec_partial.ll
|
…
|
|
vec_reassociate.ll
|
…
|
|
vec_return.ll
|
…
|
|
vec_round.ll
|
…
|
|
vec_sdiv_to_shift.ll
|
…
|
|
vec_set-2.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
vec_set-3.ll
|
…
|
|
vec_set-4.ll
|
…
|
|
vec_set-6.ll
|
…
|
|
vec_set-7.ll
|
…
|
|
vec_set-8.ll
|
…
|
|
vec_set-A.ll
|
…
|
|
vec_set-B.ll
|
…
|
|
vec_set-C.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
vec_set-D.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
vec_set-F.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
vec_set-H.ll
|
…
|
|
vec_set.ll
|
…
|
|
vec_setcc-2.ll
|
…
|
|
vec_setcc.ll
|
…
|
|
vec_shift.ll
|
…
|
|
vec_shift2.ll
|
…
|
|
vec_shift3.ll
|
…
|
|
vec_shift4.ll
|
…
|
|
vec_shift5.ll
|
…
|
|
vec_shift6.ll
|
[X86][AVX512] Detect repeated constant patterns in BUILD_VECTOR suitable for broadcasting.
|
2016-12-06 12:24:14 +00:00 |
vec_shift7.ll
|
…
|
|
vec_shuf-insert.ll
|
…
|
|
vec_split.ll
|
…
|
|
vec_ss_load_fold.ll
|
[X86] Teach selectScalarSSELoad to accept full 128-bit vector loads and the X86ISD::VZEXT_LOAD opcode.
|
2016-12-12 07:57:24 +00:00 |
vec_trunc_sext.ll
|
…
|
|
vec_udiv_to_shift.ll
|
…
|
|
vec_uint_to_fp-fastmath.ll
|
[X86][SSE] Add support for extracting constant bit data from broadcasted constants
|
2016-12-02 13:16:08 +00:00 |
vec_uint_to_fp.ll
|
…
|
|
vec_unsafe-fp-math.ll
|
…
|
|
vec_zero-2.ll
|
…
|
|
vec_zero.ll
|
…
|
|
vec_zero_cse.ll
|
…
|
|
vector-bitreverse.ll
|
[SelectionDAG] Add support for BITREVERSE constant folding
|
2017-01-16 13:39:00 +00:00 |
vector-blend.ll
|
[SelectionDAG] Update ComputeNumSignBits SRA/SHL handlers to accept scalar or vector splats
|
2016-10-24 21:47:19 +00:00 |
vector-compare-all_of.ll
|
[X86][AVX512] Add all_of/any_of avx512vl tests
|
2017-01-17 17:33:18 +00:00 |
vector-compare-any_of.ll
|
[X86][AVX512] Add all_of/any_of avx512vl tests
|
2017-01-17 17:33:18 +00:00 |
vector-compare-combines.ll
|
…
|
|
vector-compare-results.ll
|
[AVX-512] Add patterns to use a zero masked VPTERNLOG instruction for vselects of all ones and all zeros.
|
2017-01-09 02:44:34 +00:00 |
vector-gep.ll
|
…
|
|
vector-half-conversions.ll
|
[AVX-512] Teach EVEX to VEX conversion pass to handle VINSERT and VEXTRACT instructions.
|
2017-01-03 05:46:18 +00:00 |
vector-idiv-sdiv-128.ll
|
[X86][SSE] Add support for (V)PMOVSX* constant folding
|
2016-10-25 14:29:25 +00:00 |
vector-idiv-sdiv-256.ll
|
[X86][SSE] Add support for (V)PMOVSX* constant folding
|
2016-10-25 14:29:25 +00:00 |
vector-idiv-sdiv-512.ll
|
[X86][SSE] Add support for (V)PMOVSX* constant folding
|
2016-10-25 14:29:25 +00:00 |
vector-idiv-udiv-128.ll
|
[X86][SSE] Add support for combining SSE VSHLI/VSRLI uniform constant shifts.
|
2016-12-12 13:33:58 +00:00 |
vector-idiv-udiv-256.ll
|
[X86][SSE] Add support for (V)PMOVSX* constant folding
|
2016-10-25 14:29:25 +00:00 |
vector-idiv-udiv-512.ll
|
[X86][SSE] Add support for (V)PMOVSX* constant folding
|
2016-10-25 14:29:25 +00:00 |
vector-idiv.ll
|
…
|
|
vector-interleave.ll
|
[X86][SSE] Added vector interleave test (PR21281)
|
2016-08-20 17:07:38 +00:00 |
vector-intrinsics.ll
|
…
|
|
vector-lzcnt-128.ll
|
[X86][SSE] Add support for combining SSE VSHLI/VSRLI uniform constant shifts.
|
2016-12-12 13:33:58 +00:00 |
vector-lzcnt-256.ll
|
[AVX-512] Teach EVEX to VEX conversion pass to handle VINSERT and VEXTRACT instructions.
|
2017-01-03 05:46:18 +00:00 |
vector-lzcnt-512.ll
|
[AVX512] Add ExeDomain to vector extend and truncate instructions.
|
2016-07-22 05:46:44 +00:00 |
vector-merge-store-fp-constants.ll
|
…
|
|
vector-pcmp.ll
|
…
|
|
vector-popcnt-128.ll
|
[X86][SSE] Add initial support for combining target shuffles to (V)PMOVZX.
|
2016-11-29 14:18:51 +00:00 |
vector-popcnt-256.ll
|
[X86][SSE] Add initial support for combining target shuffles to (V)PMOVZX.
|
2016-11-29 14:18:51 +00:00 |
vector-popcnt-512.ll
|
…
|
|
vector-rem.ll
|
[X86][SSE] Avoid specifying unused arguments in SHUFPD lowering
|
2016-08-22 12:56:54 +00:00 |
vector-rotate-128.ll
|
[X86] Optimize vector shifts with variable but uniform shift amounts
|
2017-01-05 15:11:43 +00:00 |
vector-rotate-256.ll
|
…
|
|
vector-sext.ll
|
[AVX-512] Add patterns to use a zero masked VPTERNLOG instruction for vselects of all ones and all zeros.
|
2017-01-09 02:44:34 +00:00 |
vector-shift-ashr-128.ll
|
[X86][AVX512] Add support for variable ASHR v2i64/v4i64 support without VLX
|
2017-01-13 13:16:19 +00:00 |
vector-shift-ashr-256.ll
|
[X86][AVX512] Add support for variable ASHR v2i64/v4i64 support without VLX
|
2017-01-13 13:16:19 +00:00 |
vector-shift-ashr-512.ll
|
[X86][AVX512BW] Vectorize v64i8 vector shifts
|
2017-01-11 10:36:51 +00:00 |
vector-shift-lshr-128.ll
|
[X86][AVX512VL] Added AVX512VL to 128/256 bit vector shift tests
|
2017-01-09 22:13:51 +00:00 |
vector-shift-lshr-256.ll
|
[X86][AVX512VL] Added AVX512VL to 128/256 bit vector shift tests
|
2017-01-09 22:13:51 +00:00 |
vector-shift-lshr-512.ll
|
[X86][AVX512BW] Vectorize v64i8 vector shifts
|
2017-01-11 10:36:51 +00:00 |
vector-shift-shl-128.ll
|
[X86][AVX512VL] Added AVX512VL to 128/256 bit vector shift tests
|
2017-01-09 22:13:51 +00:00 |
vector-shift-shl-256.ll
|
[X86][AVX512VL] Added AVX512VL to 128/256 bit vector shift tests
|
2017-01-09 22:13:51 +00:00 |
vector-shift-shl-512.ll
|
[X86][AVX512BW] Vectorize v64i8 vector shifts
|
2017-01-11 10:36:51 +00:00 |
vector-shuffle-128-v2.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
vector-shuffle-128-v4.ll
|
[X86][AVX] Regenerate shuffle 128-bit tests.
|
2017-01-06 15:56:52 +00:00 |
vector-shuffle-128-v8.ll
|
[X86][AVX] Regenerate shuffle 128-bit tests.
|
2017-01-06 15:56:52 +00:00 |
vector-shuffle-128-v16.ll
|
Fix blend mask by switch the side of the operand since Blend node uses opposite mask then Select NODE.
|
2017-01-15 16:43:14 +00:00 |
vector-shuffle-256-v4.ll
|
[AVX-512] Replace V_SET0 in AVX-512 patterns with AVX512_128_SET0. Enhance AVX512_128_SET0 expansion to make this possible.
|
2017-01-14 07:29:24 +00:00 |
vector-shuffle-256-v8.ll
|
[AVX-512] Teach EVEX to VEX conversion pass to handle VINSERT and VEXTRACT instructions.
|
2017-01-03 05:46:18 +00:00 |
vector-shuffle-256-v16.ll
|
Fix blend mask by switch the side of the operand since Blend node uses opposite mask then Select NODE.
|
2017-01-15 16:43:14 +00:00 |
vector-shuffle-256-v32.ll
|
Fix blend mask by switch the side of the operand since Blend node uses opposite mask then Select NODE.
|
2017-01-15 16:43:14 +00:00 |
vector-shuffle-512-v8.ll
|
[AVX-512] Add test cases that show where we are using two subvector inserts to broadcast a 128-bit subvector into a 512-bit vector. We'd be better off using something like SHUFF32X4.
|
2017-01-19 07:37:45 +00:00 |
vector-shuffle-512-v16.ll
|
[AVX-512] Add test cases that show where we are using two subvector inserts to broadcast a 128-bit subvector into a 512-bit vector. We'd be better off using something like SHUFF32X4.
|
2017-01-19 07:37:45 +00:00 |
vector-shuffle-512-v32.ll
|
Fix blend mask by switch the side of the operand since Blend node uses opposite mask then Select NODE.
|
2017-01-15 16:43:14 +00:00 |
vector-shuffle-512-v64.ll
|
[X86][AVX512] Use lowerShuffleAsRepeatedMaskAndLanePermute for non-VBMI v64i8 shuffles (PR31470)
|
2017-01-07 15:37:50 +00:00 |
vector-shuffle-avx512.ll
|
Fix blend mask by switch the side of the operand since Blend node uses opposite mask then Select NODE.
|
2017-01-15 16:43:14 +00:00 |
vector-shuffle-combining-avx.ll
|
[X86][SSE] Add support for target shuffle constant folding
|
2016-11-30 16:33:46 +00:00 |
vector-shuffle-combining-avx2.ll
|
[X86][SSE] Add support for combining AND bitmasks to shuffles.
|
2016-12-01 15:41:40 +00:00 |
vector-shuffle-combining-avx512bw.ll
|
[X86][SSE] Add support for combining target shuffles to SHUFPD.
|
2016-12-11 21:26:25 +00:00 |
vector-shuffle-combining-avx512bwvl.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
vector-shuffle-combining-avx512vbmi.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
vector-shuffle-combining-ssse3.ll
|
[X86][SSE] Add support for combining AND bitmasks to shuffles.
|
2016-12-01 15:41:40 +00:00 |
vector-shuffle-combining-xop.ll
|
[X86][XOP] Add vpermil2ps target shuffle -> insertps combine test
|
2017-01-11 18:48:00 +00:00 |
vector-shuffle-combining.ll
|
[X86][SSE] Combine shuffles to MOVSS/MOVSD whatever the domain.
|
2016-12-16 11:48:51 +00:00 |
vector-shuffle-masked.ll
|
[AVX-512] Add support for taking a bitcast between a SUBV_BROADCAST and VSELECT and moving it to the input of the SUBV_BROADCAST if it will help with using a masked operation.
|
2017-01-17 06:49:59 +00:00 |
vector-shuffle-mmx.ll
|
[X86][SSE] Add support for combining target shuffles to SHUFPS.
|
2016-12-18 14:26:02 +00:00 |
vector-shuffle-sse1.ll
|
[X86][SSE] Regenerate SSE1 shuffle tests
|
2016-08-06 13:46:09 +00:00 |
vector-shuffle-sse4a.ll
|
[X86][SSE4A] The EXTRQ/INSERTQ bit extraction/insertion ops should be in the integer domain
|
2016-08-26 09:55:41 +00:00 |
vector-shuffle-sse41.ll
|
…
|
|
vector-shuffle-v1.ll
|
[AVX-512] Add patterns to use a zero masked VPTERNLOG instruction for vselects of all ones and all zeros.
|
2017-01-09 02:44:34 +00:00 |
vector-shuffle-variable-128.ll
|
DAG: Avoid OOB when legalizing vector indexing
|
2017-01-10 22:02:30 +00:00 |
vector-shuffle-variable-256.ll
|
DAG: Avoid OOB when legalizing vector indexing
|
2017-01-10 22:02:30 +00:00 |
vector-sqrt.ll
|
[X86][SSE] Regenerate sqrt tests
|
2017-01-22 21:15:27 +00:00 |
vector-trunc-math.ll
|
[X86][SSE] Attempt to pre-truncate arithmetic operations that have already been extended
|
2017-01-19 16:25:02 +00:00 |
vector-trunc.ll
|
[AVX-512] Teach EVEX to VEX conversion pass to handle VINSERT and VEXTRACT instructions.
|
2017-01-03 05:46:18 +00:00 |
vector-tzcnt-128.ll
|
[X86][AVX] Regenerate tzcnt tests.
|
2017-01-06 15:54:23 +00:00 |
vector-tzcnt-256.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
vector-tzcnt-512.ll
|
Fix comment typos - full update script path in assertions note
|
2016-10-08 18:51:55 +00:00 |
vector-variable-idx.ll
|
…
|
|
vector-variable-idx2.ll
|
…
|
|
vector-zext.ll
|
[X86][SSE] Add support for combining target shuffles to AND bitmasks.
|
2016-12-01 13:47:02 +00:00 |
vector-zmov.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
vector.ll
|
…
|
|
vectorcall.ll
|
[X86] Vectorcall Calling Convention - Adding CodeGen Complete Support
|
2016-12-21 09:18:37 +00:00 |
version_directive.ll
|
…
|
|
vfcmp.ll
|
…
|
|
viabs.ll
|
This is a large patch for X86 AVX-512 of an optimization for reducing code size by encoding EVEX AVX-512 instructions using the shorter VEX encoding when possible.
|
2016-12-28 10:12:48 +00:00 |
virtual-registers-cleared-in-machine-functions-liveins.ll
|
…
|
|
visibility.ll
|
…
|
|
visibility2.ll
|
…
|
|
vmovq.ll
|
…
|
|
volatile.ll
|
…
|
|
vortex-bug.ll
|
…
|
|
vselect-2.ll
|
[X86][SSE] Regenerate vselect tests and improve AVX1/AVX2 coverage
|
2016-10-01 13:10:14 +00:00 |
vselect-avx.ll
|
[X86][SSE] Add support for target shuffle constant folding
|
2016-11-30 16:33:46 +00:00 |
vselect-minmax.ll
|
Revert r291645 "[DAGCombiner] Teach DAG combiner to fold (vselect (N0 xor AllOnes), N1, N2) -> (vselect N0, N2, N1). Only do this if the target indicates its vector boolean type is ZeroOrNegativeOneBooleanContent."
|
2017-01-11 04:59:25 +00:00 |
vselect.ll
|
[X86][SSE] Regenerate vselect tests and improve AVX1/AVX2 coverage
|
2016-10-01 13:10:14 +00:00 |
vshift-1.ll
|
[X86][SSE] Regenerate vshift tests
|
2016-07-30 20:28:02 +00:00 |
vshift-2.ll
|
[X86][SSE] Regenerate vshift tests
|
2016-07-30 20:28:02 +00:00 |
vshift-3.ll
|
[X86][SSE] Regenerate vshift tests
|
2016-07-30 20:28:02 +00:00 |
vshift-4.ll
|
[X86] Optimize vector shifts with variable but uniform shift amounts
|
2017-01-05 15:11:43 +00:00 |
vshift-5.ll
|
[X86][SSE] Regenerate vshift tests
|
2016-07-30 20:28:02 +00:00 |
vshift-6.ll
|
[X86][SSE] Regenerate vshift tests
|
2016-07-30 20:28:02 +00:00 |
vshift_scalar.ll
|
…
|
|
vshift_split.ll
|
…
|
|
vshift_split2.ll
|
…
|
|
vsplit-and.ll
|
[x86] use a single shufps when it can save instructions
|
2016-12-15 18:03:38 +00:00 |
vzero-excess.ll
|
…
|
|
warn-stack.ll
|
…
|
|
weak.ll
|
…
|
|
weak_def_can_be_hidden.ll
|
…
|
|
webkit-jscc.ll
|
…
|
|
wide-fma-contraction.ll
|
…
|
|
wide-integer-cmp.ll
|
…
|
|
wide-integer-fold.ll
|
…
|
|
widen_arith-1.ll
|
…
|
|
widen_arith-2.ll
|
…
|
|
widen_arith-3.ll
|
…
|
|
widen_arith-4.ll
|
…
|
|
widen_arith-5.ll
|
…
|
|
widen_arith-6.ll
|
…
|
|
widen_bitops-0.ll
|
…
|
|
widen_bitops-1.ll
|
…
|
|
widen_cast-1.ll
|
…
|
|
widen_cast-2.ll
|
…
|
|
widen_cast-3.ll
|
[X86][SSE] Regenerate and add 32-bit tests to widening tests
|
2016-10-08 19:54:28 +00:00 |
widen_cast-4.ll
|
…
|
|
widen_cast-5.ll
|
[X86][SSE] Regenerate and add 32-bit tests to widening tests
|
2016-10-08 19:54:28 +00:00 |
widen_cast-6.ll
|
[X86][SSE] Regenerate and add 32-bit tests to widening tests
|
2016-10-08 19:54:28 +00:00 |
widen_compare-1.ll
|
…
|
|
widen_conv-1.ll
|
[X86][SSE] Allow folding of store/zext with PEXTRW of 0'th element
|
2016-07-21 14:54:17 +00:00 |
widen_conv-2.ll
|
…
|
|
widen_conv-3.ll
|
[X86][SSE] Avoid specifying unused arguments in SHUFPD lowering
|
2016-08-22 12:56:54 +00:00 |
widen_conv-4.ll
|
[X86][SSE] Avoid specifying unused arguments in SHUFPD lowering
|
2016-08-22 12:56:54 +00:00 |
widen_conversions.ll
|
[X86][SSE] Regenerate and add 32-bit tests to widening tests
|
2016-10-08 19:54:28 +00:00 |
widen_extract-1.ll
|
[X86][SSE] Regenerate subvector extraction widening test
|
2016-08-20 22:00:53 +00:00 |
widen_load-0.ll
|
[X86][SSE] Regenerate and add 32-bit tests to widening tests
|
2016-10-08 19:54:28 +00:00 |
widen_load-1.ll
|
…
|
|
widen_load-2.ll
|
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
|
2016-12-15 16:05:29 +00:00 |
widen_shuffle-1.ll
|
[X86][SSE] Add support for target shuffle constant folding
|
2016-11-30 16:33:46 +00:00 |
widened-broadcast.ll
|
[X86][SSE] Added float widened broadcast tests
|
2016-07-23 21:24:02 +00:00 |
win-alloca-expander.ll
|
…
|
|
win-catchpad-csrs.ll
|
…
|
|
win-catchpad-nested-cxx.ll
|
…
|
|
win-catchpad-nested.ll
|
…
|
|
win-catchpad-varargs.ll
|
…
|
|
win-catchpad.ll
|
…
|
|
win-cleanuppad.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
win-funclet-cfi.ll
|
…
|
|
win-mixed-ehpersonality.ll
|
…
|
|
win32-eh-states.ll
|
…
|
|
win32-eh.ll
|
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
|
2016-12-14 16:43:44 +00:00 |
win32-pic-jumptable.ll
|
MCStreamer: Use "cfi" for CFI related temp labels.
|
2016-11-30 23:48:26 +00:00 |
win32-seh-catchpad-realign.ll
|
…
|
|
win32-seh-catchpad.ll
|
…
|
|
win32-seh-nested-finally.ll
|
…
|
|
win32-spill-xmm.ll
|
…
|
|
win32_sret.ll
|
[X86] Optimization for replacing LEA with MOV at frame index elimination time
|
2016-09-26 06:42:07 +00:00 |
win64-jumptable.ll
|
Revert "[COFF] Use 32-bit jump table entries in .rdata for Win64"
|
2016-12-29 17:07:10 +00:00 |
win64-nosse-csrs.ll
|
[X86] Don't preserve Win64 SSE CSRs when SSE is disabled
|
2016-09-30 00:17:49 +00:00 |
win64_alloca_dynalloca.ll
|
…
|
|
win64_call_epi.ll
|
…
|
|
win64_eh.ll
|
Win64: Don't emit unwind info for "leaf" functions (PR30337)
|
2016-09-22 19:50:05 +00:00 |
win64_eh_leaf.ll
|
Win64: Don't emit unwind info for "leaf" functions (PR30337)
|
2016-09-22 19:50:05 +00:00 |
win64_frame.ll
|
Create llvm.addressofreturnaddress intrinsic
|
2016-10-12 22:13:19 +00:00 |
win64_nonvol.ll
|
…
|
|
win64_params.ll
|
…
|
|
win64_sibcall.ll
|
Win64: Don't use REX prefix for direct tail calls
|
2016-09-08 23:35:10 +00:00 |
win64_vararg.ll
|
…
|
|
win_chkstk.ll
|
Fix for PR30687. Avoid dereferencing MBB.end().
|
2016-10-13 15:48:48 +00:00 |
win_coreclr_chkstk.ll
|
…
|
|
win_cst_pool.ll
|
…
|
|
windows-itanium-alloca.ll
|
…
|
|
wineh-coreclr.ll
|
Revert EH-specific checks in BranchFolding that were causing blow ups in compile time.
|
2016-07-27 17:55:33 +00:00 |
wineh-exceptionpointer.ll
|
…
|
|
wineh-no-ehpads.ll
|
…
|
|
x32-function_pointer-1.ll
|
…
|
|
x32-function_pointer-2.ll
|
…
|
|
x32-function_pointer-3.ll
|
…
|
|
x32-indirectbr.ll
|
…
|
|
x32-landingpad.ll
|
…
|
|
x32-lea-1.ll
|
…
|
|
x32-movtopush64.ll
|
[llvm] Remove redundant --check-prefix=CHECK from tests
|
2016-10-24 18:57:55 +00:00 |
x32-va_start.ll
|
…
|
|
x86-16.ll
|
…
|
|
x86-32-intrcc.ll
|
…
|
|
x86-32-vector-calling-conv.ll
|
[X86] Add VPADD instructions to X86InstrInfo::isAssociativeAndCommutative.
|
2016-07-18 06:14:54 +00:00 |
x86-64-and-mask.ll
|
…
|
|
x86-64-arg.ll
|
…
|
|
x86-64-asm.ll
|
…
|
|
x86-64-baseptr.ll
|
…
|
|
x86-64-call.ll
|
…
|
|
x86-64-dead-stack-adjust.ll
|
…
|
|
x86-64-disp.ll
|
…
|
|
x86-64-double-precision-shift-left.ll
|
…
|
|
x86-64-double-precision-shift-right.ll
|
…
|
|
x86-64-double-shifts-Oz-Os-O2.ll
|
…
|
|
x86-64-double-shifts-var.ll
|
AMD family 17h (znver1) enablement
|
2017-01-10 06:01:16 +00:00 |
x86-64-extend-shift.ll
|
…
|
|
x86-64-flags-intrinsics.ll
|
…
|
|
x86-64-gv-offset.ll
|
…
|
|
x86-64-intrcc.ll
|
…
|
|
x86-64-jumps.ll
|
…
|
|
x86-64-mem.ll
|
…
|
|
x86-64-ms_abi-vararg.ll
|
…
|
|
x86-64-pic-1.ll
|
…
|
|
x86-64-pic-2.ll
|
…
|
|
x86-64-pic-3.ll
|
…
|
|
x86-64-pic-4.ll
|
…
|
|
x86-64-pic-5.ll
|
…
|
|
x86-64-pic-6.ll
|
…
|
|
x86-64-pic-7.ll
|
…
|
|
x86-64-pic-8.ll
|
…
|
|
x86-64-pic-9.ll
|
…
|
|
x86-64-pic-10.ll
|
…
|
|
x86-64-pic-11.ll
|
…
|
|
x86-64-pic-12.ll
|
X86: Do not produce GOT relocations on windows
|
2016-10-03 20:11:24 +00:00 |
x86-64-pic.ll
|
…
|
|
x86-64-plt-relative-reloc.ll
|
…
|
|
x86-64-psub.ll
|
…
|
|
x86-64-ptr-arg-simple.ll
|
…
|
|
x86-64-ret0.ll
|
…
|
|
x86-64-shortint.ll
|
…
|
|
x86-64-sret-return-2.ll
|
…
|
|
x86-64-sret-return.ll
|
…
|
|
x86-64-stack-and-frame-ptr.ll
|
…
|
|
x86-64-static-relo-movl.ll
|
…
|
|
x86-64-tls-1.ll
|
…
|
|
x86-64-varargs.ll
|
…
|
|
x86-big-ret.ll
|
…
|
|
x86-flags-intrinsics.ll
|
…
|
|
x86-fold-pshufb.ll
|
…
|
|
x86-framelowering-trap.ll
|
[X86] Don't model UD2/UD2B as a terminator
|
2016-08-09 17:55:12 +00:00 |
x86-inline-asm-validation.ll
|
…
|
|
x86-interleaved-access.ll
|
Add a pass to optimize patterns of vectorized interleaved memory accesses for
|
2016-10-14 18:20:41 +00:00 |
x86-interrupt_cc.ll
|
…
|
|
x86-interrupt_cld.ll
|
…
|
|
x86-interrupt_vzeroupper.ll
|
…
|
|
x86-mixed-alignment-dagcombine.ll
|
…
|
|
x86-plt-relative-reloc.ll
|
…
|
|
x86-repmov-copy-eflags.ll
|
…
|
|
x86-sanitizer-shrink-wrapping.ll
|
Fix some broken CHECK lines.
|
2017-01-22 20:28:56 +00:00 |
x86-setcc-int-to-fp-combine.ll
|
[X86][SSE] Regenerate fcmp/uitofp combine tests
|
2016-09-04 17:16:01 +00:00 |
x86-shifts.ll
|
[X86][SSE] Regenerate shifts tests
|
2016-07-24 15:25:36 +00:00 |
x86-shrink-wrap-unwind.ll
|
…
|
|
x86-shrink-wrapping.ll
|
…
|
|
x86-store-gv-addr.ll
|
…
|
|
x86-upgrade-avx-vbroadcast.ll
|
[X86][AVX] Regenerate broadcast upgrade tests
|
2016-07-14 11:05:43 +00:00 |
x86-upgrade-avx2-vbroadcast.ll
|
[X86][AVX] Regenerate broadcast upgrade tests
|
2016-07-14 11:05:43 +00:00 |
x86-win64-shrink-wrapping.ll
|
…
|
|
x86_64-mul-by-const.ll
|
…
|
|
x87.ll
|
…
|
|
xaluo.ll
|
AVX-512: Fixed a bug in lowering saturated operations on KNL.
|
2016-09-20 11:02:26 +00:00 |
xmm-r64.ll
|
…
|
|
xmulo.ll
|
…
|
|
xop-ifma.ll
|
[X86][XOP] Added support for VPMADCSWD 'extend+hadd' IFMA patterns
|
2017-01-14 18:52:13 +00:00 |
xop-intrinsics-fast-isel.ll
|
…
|
|
xop-intrinsics-x86_64-upgrade.ll
|
…
|
|
xop-intrinsics-x86_64.ll
|
…
|
|
xop-mask-comments.ll
|
[X86][XOP] Tweak vpermil2pd test to stop it being combined away
|
2016-08-20 21:07:41 +00:00 |
xop-pcmov.ll
|
…
|
|
xor-icmp.ll
|
…
|
|
xor-select-i1-combine.ll
|
[llvm] Remove redundant --check-prefix=CHECK from tests
|
2016-10-24 18:57:55 +00:00 |
xor.ll
|
…
|
|
xray-attribute-instrumentation.ll
|
[xray] Add XRay support for Mach-O in CodeGen
|
2016-11-23 02:07:04 +00:00 |
xray-empty-firstmbb.mir
|
[XRay] Fix assertion failure on empty machine basic blocks (PR 31424)
|
2016-12-19 09:20:38 +00:00 |
xray-empty-function.mir
|
[XRay] Fix assertion failure on empty machine basic blocks (PR 31424)
|
2016-12-19 09:20:38 +00:00 |
xray-multiplerets-in-blocks.mir
|
GlobalISel: use G_TYPE to annotate physregs with a type.
|
2016-08-31 21:24:02 +00:00 |
xray-section-group.ll
|
[XRay] Test for xray_instr_map in object file. (NFC)
|
2016-08-09 10:42:11 +00:00 |
xray-selective-instrumentation-miss.ll
|
XRay: Add entry and exit sleds
|
2016-07-14 04:06:33 +00:00 |
xray-selective-instrumentation.ll
|
XRay: Add entry and exit sleds
|
2016-07-14 04:06:33 +00:00 |
xray-tail-call-sled.ll
|
[xray] Add XRay support for Mach-O in CodeGen
|
2016-11-23 02:07:04 +00:00 |
xtest.ll
|
…
|
|
zero-remat.ll
|
…
|
|
zext-extract_subreg.ll
|
…
|
|
zext-fold.ll
|
…
|
|
zext-inreg-0.ll
|
…
|
|
zext-inreg-1.ll
|
…
|
|
zext-sext.ll
|
…
|
|
zext-shl.ll
|
…
|
|
zext-trunc.ll
|
…
|
|
zlib-longest-match.ll
|
…
|
|