llvm-project/llvm/test/CodeGen
Craig Topper 93f38e1f1a [X86] Explcitly disable VEXTRACT instruction matching for an immediate of 0. Remove a bunch of isel patterns that become unnecessary.
We effectively had a second set of isel patterns that tried to use a
regular store instruction and an extract_subreg instruction. Or a masked move
and an extract_subreg. These patterns were intended to override the
matching of VEXTRACT instructions by taking advantage of the priority
of the explicit immediate 0 for the index.

This patch instaed just disables the immediate 0 matchin the VEXTRACT
patterns. This each of the component pieces of the larger patterns will
match by themselves.

This found a bug of sorts were we didn't use 128-bit store for 512->128
extract on KNL. Its unclear what the right thing here should be.
Using the vextract avoids constraining the register allocator to use
xmm0-15. But it always results in a longer encoding if the register
allocator ends up choosing xmm0-15 anyway.

llvm-svn: 361431
2019-05-22 21:00:18 +00:00
..
AArch64 [DebugInfo][AArch64] Recognise target specific instruction as mov instr 2019-05-22 18:48:58 +00:00
AMDGPU MC: Allow getMaxInstLength to depend on the subtarget 2019-05-22 16:28:41 +00:00
ARC
ARM [TargetLowering] Extend bool args to inline-asm according to getBooleanType 2019-05-22 16:16:15 +00:00
AVR Add TargetLoweringInfo hook for explicitly setting the ABI calling convention endianess 2019-05-21 06:38:02 +00:00
BPF [BPF] emit BTF sections only if debuginfo available 2019-05-13 05:00:23 +00:00
Generic [IR] allow fast-math-flags on select of FP values 2019-05-22 15:50:46 +00:00
Hexagon [llvm-readobj] Change -long-option to --long-option in tests. NFC 2019-05-01 05:27:20 +00:00
Inputs
Lanai [AsmPrinter] refactor to support %c w/ GlobalAddress' 2019-04-26 18:45:04 +00:00
MIR [AMDGPU] gfx1010 tests. NFC. 2019-05-13 19:30:06 +00:00
MSP430 [AsmPrinter] refactor to support %c w/ GlobalAddress' 2019-04-26 18:45:04 +00:00
Mips [TargetLowering] Extend bool args to inline-asm according to getBooleanType 2019-05-22 16:16:15 +00:00
NVPTX SelectionDAG: accommodate atomic floating stores. 2019-05-10 11:23:04 +00:00
PowerPC [TargetLowering] Extend bool args to inline-asm according to getBooleanType 2019-05-22 16:16:15 +00:00
RISCV [TargetLowering] Extend bool args to inline-asm according to getBooleanType 2019-05-22 16:16:15 +00:00
SPARC [TargetLowering] Extend bool args to inline-asm according to getBooleanType 2019-05-22 16:16:15 +00:00
SystemZ [TargetLowering] Extend bool args to inline-asm according to getBooleanType 2019-05-22 16:16:15 +00:00
Thumb [TargetLowering] Extend bool args to inline-asm according to getBooleanType 2019-05-22 16:16:15 +00:00
Thumb2 [TargetLowering] Extend bool args to inline-asm according to getBooleanType 2019-05-22 16:16:15 +00:00
WebAssembly [WebAssembly] Add the signature for the new llround builtin function 2019-05-21 23:06:34 +00:00
WinCFGuard
WinEH
X86 [X86] Explcitly disable VEXTRACT instruction matching for an immediate of 0. Remove a bunch of isel patterns that become unnecessary. 2019-05-22 21:00:18 +00:00
XCore [AsmPrinter] refactor to support %c w/ GlobalAddress' 2019-04-26 18:45:04 +00:00