llvm-project/mlir
xndcn 9de88fc0ea [mlir][emitc] Fix indent in CondBranchOp and block label
1. Add missing indent in CondBranchOp
2. Remove indent in block label

Differential Revision: https://reviews.llvm.org/D109805
2021-09-19 20:03:42 +08:00
..
cmake/modules [mlir][python] Simplify python extension loading. 2021-09-03 00:43:28 +00:00
docs [mlir] Update docs on conversion and translation to LLVM 2021-09-15 09:50:21 +02:00
examples Change ASM Op printer to print the operation name in the framework instead of leaving it up to each individual operation 2021-08-31 17:52:40 +00:00
include [MLIR] Simplex: rename num{Variables,Constraints} to getNum{Variables,Constraints} 2021-09-18 22:39:35 +05:30
lib [mlir][emitc] Fix indent in CondBranchOp and block label 2021-09-19 20:03:42 +08:00
python [mlir][OpDSL] Update op definitions to make shapes more concise (NFC). 2021-09-16 06:02:00 +00:00
test [mlir-c] Add getting fused loc 2021-09-18 06:57:51 -07:00
tools [DRR] Explicit Return Types in Rewrites 2021-09-15 14:25:29 -07:00
unittests [MLIR] Simplex: rename num{Variables,Constraints} to getNum{Variables,Constraints} 2021-09-18 22:39:35 +05:30
utils [vscode-mlir] Add proper support for mlir markdown codeblocks 2021-08-03 19:55:31 +00:00
.clang-format
.clang-tidy NFC: .clang-tidy: Inherit configs from parents to improve maintainability 2021-06-08 08:25:59 -07:00
CMakeLists.txt [MLIR] Drop old cmake var names 2021-05-24 15:30:01 +05:30
LICENSE.TXT
README.md

README.md

Multi-Level Intermediate Representation

See https://mlir.llvm.org/ for more information.